From e3d457d72f59bd442a3a8d13b311d7c8444e177d Mon Sep 17 00:00:00 2001 From: Kleidi Bujari Date: Fri, 4 Oct 2024 17:30:14 -0400 Subject: labs 1,2 --- .../labs/lab2/Barrel_shifting/Barrel_shifting.c | 18 + .../labs/lab2/DebugConfig/Target_1_LPC1768.dbgconf | 10 + F2024/coe718/labs/lab2/EventRecorderStub.scvd | 9 + F2024/coe718/labs/lab2/Listings/bitband.map | 854 +++++ .../coe718/labs/lab2/Listings/startup_lpc17xx.lst | 1095 ++++++ F2024/coe718/labs/lab2/Objects/barrel_shifting.crf | Bin 0 -> 77529 bytes F2024/coe718/labs/lab2/Objects/barrel_shifting.d | 9 + F2024/coe718/labs/lab2/Objects/barrel_shifting.o | Bin 0 -> 73936 bytes F2024/coe718/labs/lab2/Objects/bitband.axf | Bin 0 -> 60784 bytes .../coe718/labs/lab2/Objects/bitband.build_log.htm | 108 + F2024/coe718/labs/lab2/Objects/bitband.crf | Bin 0 -> 84952 bytes F2024/coe718/labs/lab2/Objects/bitband.d | 11 + F2024/coe718/labs/lab2/Objects/bitband.htm | 622 ++++ F2024/coe718/labs/lab2/Objects/bitband.lnp | 13 + F2024/coe718/labs/lab2/Objects/bitband.o | Bin 0 -> 83208 bytes F2024/coe718/labs/lab2/Objects/bitband.sct | 16 + .../coe718/labs/lab2/Objects/bitband_Target 1.dep | 88 + F2024/coe718/labs/lab2/Objects/eventrecorder.crf | Bin 0 -> 90002 bytes F2024/coe718/labs/lab2/Objects/eventrecorder.d | 13 + F2024/coe718/labs/lab2/Objects/eventrecorder.o | Bin 0 -> 113872 bytes .../coe718/labs/lab2/Objects/glcd_spi_lpc1700.crf | Bin 0 -> 86569 bytes F2024/coe718/labs/lab2/Objects/glcd_spi_lpc1700.d | 12 + F2024/coe718/labs/lab2/Objects/glcd_spi_lpc1700.o | Bin 0 -> 125608 bytes F2024/coe718/labs/lab2/Objects/gpio_lpc17xx.crf | Bin 0 -> 79346 bytes F2024/coe718/labs/lab2/Objects/gpio_lpc17xx.d | 10 + F2024/coe718/labs/lab2/Objects/gpio_lpc17xx.o | Bin 0 -> 83236 bytes F2024/coe718/labs/lab2/Objects/irq.crf | Bin 0 -> 78469 bytes F2024/coe718/labs/lab2/Objects/irq.d | 12 + F2024/coe718/labs/lab2/Objects/irq.o | Bin 0 -> 78100 bytes F2024/coe718/labs/lab2/Objects/led.crf | Bin 0 -> 78058 bytes F2024/coe718/labs/lab2/Objects/led.d | 10 + F2024/coe718/labs/lab2/Objects/led.o | Bin 0 -> 79580 bytes F2024/coe718/labs/lab2/Objects/led_mcb1700.crf | Bin 0 -> 80994 bytes F2024/coe718/labs/lab2/Objects/led_mcb1700.d | 13 + F2024/coe718/labs/lab2/Objects/led_mcb1700.o | Bin 0 -> 87880 bytes F2024/coe718/labs/lab2/Objects/pin_lpc17xx.crf | Bin 0 -> 79833 bytes F2024/coe718/labs/lab2/Objects/pin_lpc17xx.d | 11 + F2024/coe718/labs/lab2/Objects/pin_lpc17xx.o | Bin 0 -> 81024 bytes F2024/coe718/labs/lab2/Objects/startup_lpc17xx.d | 1 + F2024/coe718/labs/lab2/Objects/startup_lpc17xx.o | Bin 0 -> 5944 bytes F2024/coe718/labs/lab2/Objects/system_lpc17xx.crf | Bin 0 -> 79771 bytes F2024/coe718/labs/lab2/Objects/system_lpc17xx.d | 9 + F2024/coe718/labs/lab2/Objects/system_lpc17xx.o | Bin 0 -> 77048 bytes .../labs/lab2/RTE/Compiler/EventRecorderConf.h | 34 + .../labs/lab2/RTE/Device/LPC1768/RTE_Device.h | 1166 +++++++ .../labs/lab2/RTE/Device/LPC1768/startup_LPC17xx.s | 287 ++ .../labs/lab2/RTE/Device/LPC1768/system_LPC17xx.c | 541 +++ .../labs/lab2/RTE/_Target_1/RTE_Components.h | 26 + F2024/coe718/labs/lab2/bitband.uvguix.ECBME | 3646 ++++++++++++++++++++ F2024/coe718/labs/lab2/bitband.uvoptx | 311 ++ F2024/coe718/labs/lab2/bitband.uvprojx | 532 +++ F2024/coe718/labs/lab2/bitbanding/Font_16x24_h.h | 472 +++ F2024/coe718/labs/lab2/bitbanding/Font_6x8_h.h | 248 ++ F2024/coe718/labs/lab2/bitbanding/GLCD.h | 59 + .../coe718/labs/lab2/bitbanding/GLCD_SPI_LPC1700.c | 928 +++++ F2024/coe718/labs/lab2/bitbanding/bitband.c | 115 + F2024/coe718/labs/lab2/bitbanding/bitband.h | 71 + F2024/coe718/labs/lab2/cond_exe/cond_ex.c | 36 + F2024/coe718/labs/lab2/report/movs.png | Bin 0 -> 11239 bytes F2024/coe718/labs/lab2/report/out.pdf | Bin 0 -> 134172 bytes F2024/coe718/labs/lab2/report/profiling.png | Bin 0 -> 9532 bytes F2024/coe718/labs/lab2/report/report.md | 208 ++ F2024/coe718/labs/lab2/report/ryeU_logo.png | Bin 0 -> 10628 bytes F2024/coe718/labs/lab2/report/times.txt | 4 + F2024/coe718/labs/lab2/report/title.aux | 8 + F2024/coe718/labs/lab2/report/title.log | 399 +++ F2024/coe718/labs/lab2/report/title.out | 0 F2024/coe718/labs/lab2/report/title.pdf | Bin 0 -> 57128 bytes F2024/coe718/labs/lab2/report/title.tex | 85 + 69 files changed, 12120 insertions(+) create mode 100755 F2024/coe718/labs/lab2/Barrel_shifting/Barrel_shifting.c create mode 100755 F2024/coe718/labs/lab2/DebugConfig/Target_1_LPC1768.dbgconf create mode 100755 F2024/coe718/labs/lab2/EventRecorderStub.scvd create mode 100755 F2024/coe718/labs/lab2/Listings/bitband.map create mode 100755 F2024/coe718/labs/lab2/Listings/startup_lpc17xx.lst create mode 100755 F2024/coe718/labs/lab2/Objects/barrel_shifting.crf create mode 100755 F2024/coe718/labs/lab2/Objects/barrel_shifting.d create mode 100755 F2024/coe718/labs/lab2/Objects/barrel_shifting.o create mode 100755 F2024/coe718/labs/lab2/Objects/bitband.axf create mode 100755 F2024/coe718/labs/lab2/Objects/bitband.build_log.htm create mode 100755 F2024/coe718/labs/lab2/Objects/bitband.crf create mode 100755 F2024/coe718/labs/lab2/Objects/bitband.d create mode 100755 F2024/coe718/labs/lab2/Objects/bitband.htm create mode 100755 F2024/coe718/labs/lab2/Objects/bitband.lnp create mode 100755 F2024/coe718/labs/lab2/Objects/bitband.o create mode 100755 F2024/coe718/labs/lab2/Objects/bitband.sct create mode 100755 F2024/coe718/labs/lab2/Objects/bitband_Target 1.dep create mode 100755 F2024/coe718/labs/lab2/Objects/eventrecorder.crf create mode 100755 F2024/coe718/labs/lab2/Objects/eventrecorder.d create mode 100755 F2024/coe718/labs/lab2/Objects/eventrecorder.o create mode 100755 F2024/coe718/labs/lab2/Objects/glcd_spi_lpc1700.crf create mode 100755 F2024/coe718/labs/lab2/Objects/glcd_spi_lpc1700.d create mode 100755 F2024/coe718/labs/lab2/Objects/glcd_spi_lpc1700.o create mode 100755 F2024/coe718/labs/lab2/Objects/gpio_lpc17xx.crf create mode 100755 F2024/coe718/labs/lab2/Objects/gpio_lpc17xx.d create mode 100755 F2024/coe718/labs/lab2/Objects/gpio_lpc17xx.o create mode 100755 F2024/coe718/labs/lab2/Objects/irq.crf create mode 100755 F2024/coe718/labs/lab2/Objects/irq.d create mode 100755 F2024/coe718/labs/lab2/Objects/irq.o create mode 100755 F2024/coe718/labs/lab2/Objects/led.crf create mode 100755 F2024/coe718/labs/lab2/Objects/led.d create mode 100755 F2024/coe718/labs/lab2/Objects/led.o create mode 100755 F2024/coe718/labs/lab2/Objects/led_mcb1700.crf create mode 100755 F2024/coe718/labs/lab2/Objects/led_mcb1700.d create mode 100755 F2024/coe718/labs/lab2/Objects/led_mcb1700.o create mode 100755 F2024/coe718/labs/lab2/Objects/pin_lpc17xx.crf create mode 100755 F2024/coe718/labs/lab2/Objects/pin_lpc17xx.d create mode 100755 F2024/coe718/labs/lab2/Objects/pin_lpc17xx.o create mode 100755 F2024/coe718/labs/lab2/Objects/startup_lpc17xx.d create mode 100755 F2024/coe718/labs/lab2/Objects/startup_lpc17xx.o create mode 100755 F2024/coe718/labs/lab2/Objects/system_lpc17xx.crf create mode 100755 F2024/coe718/labs/lab2/Objects/system_lpc17xx.d create mode 100755 F2024/coe718/labs/lab2/Objects/system_lpc17xx.o create mode 100755 F2024/coe718/labs/lab2/RTE/Compiler/EventRecorderConf.h create mode 100755 F2024/coe718/labs/lab2/RTE/Device/LPC1768/RTE_Device.h create mode 100755 F2024/coe718/labs/lab2/RTE/Device/LPC1768/startup_LPC17xx.s create mode 100755 F2024/coe718/labs/lab2/RTE/Device/LPC1768/system_LPC17xx.c create mode 100755 F2024/coe718/labs/lab2/RTE/_Target_1/RTE_Components.h create mode 100755 F2024/coe718/labs/lab2/bitband.uvguix.ECBME create mode 100755 F2024/coe718/labs/lab2/bitband.uvoptx create mode 100755 F2024/coe718/labs/lab2/bitband.uvprojx create mode 100755 F2024/coe718/labs/lab2/bitbanding/Font_16x24_h.h create mode 100755 F2024/coe718/labs/lab2/bitbanding/Font_6x8_h.h create mode 100755 F2024/coe718/labs/lab2/bitbanding/GLCD.h create mode 100755 F2024/coe718/labs/lab2/bitbanding/GLCD_SPI_LPC1700.c create mode 100755 F2024/coe718/labs/lab2/bitbanding/bitband.c create mode 100755 F2024/coe718/labs/lab2/bitbanding/bitband.h create mode 100755 F2024/coe718/labs/lab2/cond_exe/cond_ex.c create mode 100755 F2024/coe718/labs/lab2/report/movs.png create mode 100644 F2024/coe718/labs/lab2/report/out.pdf create mode 100755 F2024/coe718/labs/lab2/report/profiling.png create mode 100644 F2024/coe718/labs/lab2/report/report.md create mode 100644 F2024/coe718/labs/lab2/report/ryeU_logo.png create mode 100755 F2024/coe718/labs/lab2/report/times.txt create mode 100644 F2024/coe718/labs/lab2/report/title.aux create mode 100644 F2024/coe718/labs/lab2/report/title.log create mode 100644 F2024/coe718/labs/lab2/report/title.out create mode 100644 F2024/coe718/labs/lab2/report/title.pdf create mode 100644 F2024/coe718/labs/lab2/report/title.tex (limited to 'F2024/coe718/labs/lab2') diff --git a/F2024/coe718/labs/lab2/Barrel_shifting/Barrel_shifting.c b/F2024/coe718/labs/lab2/Barrel_shifting/Barrel_shifting.c new file mode 100755 index 0000000..21fb2cd --- /dev/null +++ b/F2024/coe718/labs/lab2/Barrel_shifting/Barrel_shifting.c @@ -0,0 +1,18 @@ +//barrel shifter code +#include "LPC17xx.h" + +int main(void){ + int r1 = 1, r2 = 0, r3 = 5; + + while(r2 <= 0x18){ + if((r1 - r2) > 0){ + r1 = r1 + 2; + r2 = r1 + (r3*4); + r3 = r3/2; + } + else{ + r2 = r2 + 1; + } + } + return 0; +} \ No newline at end of file diff --git a/F2024/coe718/labs/lab2/DebugConfig/Target_1_LPC1768.dbgconf b/F2024/coe718/labs/lab2/DebugConfig/Target_1_LPC1768.dbgconf new file mode 100755 index 0000000..ddd0031 --- /dev/null +++ b/F2024/coe718/labs/lab2/DebugConfig/Target_1_LPC1768.dbgconf @@ -0,0 +1,10 @@ +// <<< Use Configuration Wizard in Context Menu >>> + +// Debug Configuration +// StopAfterBootloader Stop after Bootloader +// +Dbg_CR = 0x00000001; + + + +// <<< end of configuration section >>> \ No newline at end of file diff --git a/F2024/coe718/labs/lab2/EventRecorderStub.scvd b/F2024/coe718/labs/lab2/EventRecorderStub.scvd new file mode 100755 index 0000000..0fb3ee5 --- /dev/null +++ b/F2024/coe718/labs/lab2/EventRecorderStub.scvd @@ -0,0 +1,9 @@ + + + + + + + + + diff --git a/F2024/coe718/labs/lab2/Listings/bitband.map b/F2024/coe718/labs/lab2/Listings/bitband.map new file mode 100755 index 0000000..52aa5d9 --- /dev/null +++ b/F2024/coe718/labs/lab2/Listings/bitband.map @@ -0,0 +1,854 @@ +Component: ARM Compiler 5.06 update 6 (build 750) Tool: armlink [4d35ed] + +============================================================================== + +Section Cross References + + bitband.o(i.SysTick_Handler) refers to bitband.o(i.method2lcd) for method2lcd + bitband.o(i.SysTick_Handler) refers to bitband.o(.data) for .data + bitband.o(i.main) refers to glcd_spi_lpc1700.o(i.GLCD_Init) for GLCD_Init + bitband.o(i.main) refers to glcd_spi_lpc1700.o(i.GLCD_Clear) for GLCD_Clear + bitband.o(i.main) refers to glcd_spi_lpc1700.o(i.GLCD_SetBackColor) for GLCD_SetBackColor + bitband.o(i.main) refers to glcd_spi_lpc1700.o(i.GLCD_SetTextColor) for GLCD_SetTextColor + bitband.o(i.main) refers to glcd_spi_lpc1700.o(i.GLCD_DisplayString) for GLCD_DisplayString + bitband.o(i.method2lcd) refers to glcd_spi_lpc1700.o(i.GLCD_DisplayString) for GLCD_DisplayString + glcd_spi_lpc1700.o(i.GLCD_Bargraph) refers to glcd_spi_lpc1700.o(i.GLCD_SetWindow) for GLCD_SetWindow + glcd_spi_lpc1700.o(i.GLCD_Bargraph) refers to glcd_spi_lpc1700.o(i.wr_cmd) for wr_cmd + glcd_spi_lpc1700.o(i.GLCD_Bargraph) refers to glcd_spi_lpc1700.o(i.wr_dat_start) for wr_dat_start + glcd_spi_lpc1700.o(i.GLCD_Bargraph) refers to glcd_spi_lpc1700.o(i.wr_dat_only) for wr_dat_only + glcd_spi_lpc1700.o(i.GLCD_Bargraph) refers to glcd_spi_lpc1700.o(.data) for .data + glcd_spi_lpc1700.o(i.GLCD_Bitmap) refers to glcd_spi_lpc1700.o(i.GLCD_SetWindow) for GLCD_SetWindow + glcd_spi_lpc1700.o(i.GLCD_Bitmap) refers to glcd_spi_lpc1700.o(i.wr_cmd) for wr_cmd + glcd_spi_lpc1700.o(i.GLCD_Bitmap) refers to glcd_spi_lpc1700.o(i.wr_dat_start) for wr_dat_start + glcd_spi_lpc1700.o(i.GLCD_Bitmap) refers to glcd_spi_lpc1700.o(i.wr_dat_only) for wr_dat_only + glcd_spi_lpc1700.o(i.GLCD_Clear) refers to glcd_spi_lpc1700.o(i.GLCD_WindowMax) for GLCD_WindowMax + glcd_spi_lpc1700.o(i.GLCD_Clear) refers to glcd_spi_lpc1700.o(i.wr_cmd) for wr_cmd + glcd_spi_lpc1700.o(i.GLCD_Clear) refers to glcd_spi_lpc1700.o(i.wr_dat_start) for wr_dat_start + glcd_spi_lpc1700.o(i.GLCD_Clear) refers to glcd_spi_lpc1700.o(i.wr_dat_only) for wr_dat_only + glcd_spi_lpc1700.o(i.GLCD_ClearLn) refers to glcd_spi_lpc1700.o(i.GLCD_WindowMax) for GLCD_WindowMax + glcd_spi_lpc1700.o(i.GLCD_ClearLn) refers to glcd_spi_lpc1700.o(i.GLCD_DisplayString) for GLCD_DisplayString + glcd_spi_lpc1700.o(i.GLCD_DisplayChar) refers to glcd_spi_lpc1700.o(i.GLCD_DrawChar) for GLCD_DrawChar + glcd_spi_lpc1700.o(i.GLCD_DisplayChar) refers to glcd_spi_lpc1700.o(.constdata) for .constdata + glcd_spi_lpc1700.o(i.GLCD_DisplayString) refers to glcd_spi_lpc1700.o(i.GLCD_DisplayChar) for GLCD_DisplayChar + glcd_spi_lpc1700.o(i.GLCD_DrawChar) refers to glcd_spi_lpc1700.o(i.GLCD_SetWindow) for GLCD_SetWindow + glcd_spi_lpc1700.o(i.GLCD_DrawChar) refers to glcd_spi_lpc1700.o(i.wr_cmd) for wr_cmd + glcd_spi_lpc1700.o(i.GLCD_DrawChar) refers to glcd_spi_lpc1700.o(i.wr_dat_start) for wr_dat_start + glcd_spi_lpc1700.o(i.GLCD_DrawChar) refers to glcd_spi_lpc1700.o(i.wr_dat_only) for wr_dat_only + glcd_spi_lpc1700.o(i.GLCD_DrawChar) refers to glcd_spi_lpc1700.o(.data) for .data + glcd_spi_lpc1700.o(i.GLCD_Init) refers to glcd_spi_lpc1700.o(i.rd_id_man) for rd_id_man + glcd_spi_lpc1700.o(i.GLCD_Init) refers to glcd_spi_lpc1700.o(i.wr_cmd) for wr_cmd + glcd_spi_lpc1700.o(i.GLCD_Init) refers to glcd_spi_lpc1700.o(i.spi_tran) for spi_tran + glcd_spi_lpc1700.o(i.GLCD_Init) refers to glcd_spi_lpc1700.o(i.wr_reg) for wr_reg + glcd_spi_lpc1700.o(i.GLCD_Init) refers to glcd_spi_lpc1700.o(i.delay) for delay + glcd_spi_lpc1700.o(i.GLCD_Init) refers to glcd_spi_lpc1700.o(.data) for .data + glcd_spi_lpc1700.o(i.GLCD_PutPixel) refers to glcd_spi_lpc1700.o(i.wr_reg) for wr_reg + glcd_spi_lpc1700.o(i.GLCD_PutPixel) refers to glcd_spi_lpc1700.o(i.wr_cmd) for wr_cmd + glcd_spi_lpc1700.o(i.GLCD_PutPixel) refers to glcd_spi_lpc1700.o(i.wr_dat) for wr_dat + glcd_spi_lpc1700.o(i.GLCD_PutPixel) refers to glcd_spi_lpc1700.o(.data) for .data + glcd_spi_lpc1700.o(i.GLCD_SetBackColor) refers to glcd_spi_lpc1700.o(.data) for .data + glcd_spi_lpc1700.o(i.GLCD_SetTextColor) refers to glcd_spi_lpc1700.o(.data) for .data + glcd_spi_lpc1700.o(i.GLCD_SetWindow) refers to glcd_spi_lpc1700.o(i.wr_reg) for wr_reg + glcd_spi_lpc1700.o(i.GLCD_SetWindow) refers to glcd_spi_lpc1700.o(.data) for .data + glcd_spi_lpc1700.o(i.GLCD_WindowMax) refers to glcd_spi_lpc1700.o(i.GLCD_SetWindow) for GLCD_SetWindow + glcd_spi_lpc1700.o(i.GLCD_WrCmd) refers to glcd_spi_lpc1700.o(i.wr_cmd) for wr_cmd + glcd_spi_lpc1700.o(i.GLCD_WrReg) refers to glcd_spi_lpc1700.o(i.wr_reg) for wr_reg + glcd_spi_lpc1700.o(i.rd_id_man) refers to glcd_spi_lpc1700.o(i.spi_tran_man) for spi_tran_man + glcd_spi_lpc1700.o(i.spi_tran_man) refers to glcd_spi_lpc1700.o(i.delay) for delay + glcd_spi_lpc1700.o(i.wr_cmd) refers to glcd_spi_lpc1700.o(i.spi_tran) for spi_tran + glcd_spi_lpc1700.o(i.wr_dat) refers to glcd_spi_lpc1700.o(i.spi_tran) for spi_tran + glcd_spi_lpc1700.o(i.wr_dat_only) refers to glcd_spi_lpc1700.o(i.spi_tran) for spi_tran + glcd_spi_lpc1700.o(i.wr_dat_start) refers to glcd_spi_lpc1700.o(i.spi_tran) for spi_tran + glcd_spi_lpc1700.o(i.wr_reg) refers to glcd_spi_lpc1700.o(i.wr_cmd) for wr_cmd + glcd_spi_lpc1700.o(i.wr_reg) refers to glcd_spi_lpc1700.o(i.wr_dat) for wr_dat + led_mcb1700.o(i.LED_Initialize) refers to gpio_lpc17xx.o(i.GPIO_PortClock) for GPIO_PortClock + led_mcb1700.o(i.LED_Initialize) refers to pin_lpc17xx.o(i.PIN_Configure) for PIN_Configure + led_mcb1700.o(i.LED_Initialize) refers to gpio_lpc17xx.o(i.GPIO_SetDir) for GPIO_SetDir + led_mcb1700.o(i.LED_Initialize) refers to gpio_lpc17xx.o(i.GPIO_PinWrite) for GPIO_PinWrite + led_mcb1700.o(i.LED_Initialize) refers to led_mcb1700.o(.constdata) for .constdata + led_mcb1700.o(i.LED_Off) refers to gpio_lpc17xx.o(i.GPIO_PinWrite) for GPIO_PinWrite + led_mcb1700.o(i.LED_Off) refers to led_mcb1700.o(.constdata) for .constdata + led_mcb1700.o(i.LED_On) refers to gpio_lpc17xx.o(i.GPIO_PinWrite) for GPIO_PinWrite + led_mcb1700.o(i.LED_On) refers to led_mcb1700.o(.constdata) for .constdata + led_mcb1700.o(i.LED_SetOut) refers to led_mcb1700.o(i.LED_On) for LED_On + led_mcb1700.o(i.LED_SetOut) refers to led_mcb1700.o(i.LED_Off) for LED_Off + led_mcb1700.o(i.LED_Uninitialize) refers to pin_lpc17xx.o(i.PIN_Configure) for PIN_Configure + led_mcb1700.o(i.LED_Uninitialize) refers to led_mcb1700.o(.constdata) for .constdata + eventrecorder.o(i.EventCheckFilter) refers to eventrecorder.o(.bss.noinit) for .bss.noinit + eventrecorder.o(i.EventGetTS) refers to eventrecorder.o(i.EventRecorderTimerGetCount) for EventRecorderTimerGetCount + eventrecorder.o(i.EventGetTS) refers to eventrecorder.o(.emb_text) for __asm___15_EventRecorder_c_e8d3082c__atomic_xch32 + eventrecorder.o(i.EventGetTS) refers to eventrecorder.o(.bss.noinit) for .bss.noinit + eventrecorder.o(i.EventRecord2) refers to eventrecorder.o(i.EventCheckFilter) for EventCheckFilter + eventrecorder.o(i.EventRecord2) refers to eventrecorder.o(i.EventGetTS) for EventGetTS + eventrecorder.o(i.EventRecord2) refers to eventrecorder.o(i.EventRecordItem) for EventRecordItem + eventrecorder.o(i.EventRecord4) refers to eventrecorder.o(i.EventCheckFilter) for EventCheckFilter + eventrecorder.o(i.EventRecord4) refers to eventrecorder.o(i.EventGetTS) for EventGetTS + eventrecorder.o(i.EventRecord4) refers to eventrecorder.o(.emb_text) for __asm___15_EventRecorder_c_e8d3082c__atomic_inc8 + eventrecorder.o(i.EventRecord4) refers to eventrecorder.o(i.EventRecordItem) for EventRecordItem + eventrecorder.o(i.EventRecord4) refers to eventrecorder.o(.bss.noinit) for .bss.noinit + eventrecorder.o(i.EventRecordData) refers to eventrecorder.o(i.EventCheckFilter) for EventCheckFilter + eventrecorder.o(i.EventRecordData) refers to eventrecorder.o(i.EventGetTS) for EventGetTS + eventrecorder.o(i.EventRecordData) refers to rt_memcpy_v6.o(.text) for __aeabi_memcpy + eventrecorder.o(i.EventRecordData) refers to eventrecorder.o(.emb_text) for __asm___15_EventRecorder_c_e8d3082c__atomic_inc8 + eventrecorder.o(i.EventRecordData) refers to eventrecorder.o(i.EventRecordItem) for EventRecordItem + eventrecorder.o(i.EventRecordData) refers to eventrecorder.o(.bss.noinit) for .bss.noinit + eventrecorder.o(i.EventRecordItem) refers to eventrecorder.o(.emb_text) for __asm___15_EventRecorder_c_e8d3082c__atomic_inc32 + eventrecorder.o(i.EventRecordItem) refers to eventrecorder.o(.bss.noinit) for .bss.noinit + eventrecorder.o(i.EventRecorderClockUpdate) refers to eventrecorder.o(i.EventRecorderTimerGetFreq) for EventRecorderTimerGetFreq + eventrecorder.o(i.EventRecorderClockUpdate) refers to eventrecorder.o(i.EventGetTS) for EventGetTS + eventrecorder.o(i.EventRecorderClockUpdate) refers to eventrecorder.o(i.EventRecordItem) for EventRecordItem + eventrecorder.o(i.EventRecorderClockUpdate) refers to eventrecorder.o(.bss.noinit) for .bss.noinit + eventrecorder.o(i.EventRecorderDisable) refers to eventrecorder.o(.bss.noinit) for .bss.noinit + eventrecorder.o(i.EventRecorderEnable) refers to eventrecorder.o(.bss.noinit) for .bss.noinit + eventrecorder.o(i.EventRecorderInitialize) refers to rt_memclr_w.o(.text) for __aeabi_memclr4 + eventrecorder.o(i.EventRecorderInitialize) refers to eventrecorder.o(i.EventRecorderTimerSetup) for EventRecorderTimerSetup + eventrecorder.o(i.EventRecorderInitialize) refers to eventrecorder.o(i.EventRecorderEnable) for EventRecorderEnable + eventrecorder.o(i.EventRecorderInitialize) refers to eventrecorder.o(i.EventGetTS) for EventGetTS + eventrecorder.o(i.EventRecorderInitialize) refers to eventrecorder.o(i.EventRecordItem) for EventRecordItem + eventrecorder.o(i.EventRecorderInitialize) refers to eventrecorder.o(i.EventRecorderStart) for EventRecorderStart + eventrecorder.o(i.EventRecorderInitialize) refers to eventrecorder.o(i.EventRecorderTimerGetFreq) for EventRecorderTimerGetFreq + eventrecorder.o(i.EventRecorderInitialize) refers to eventrecorder.o(.bss.noinit) for .bss.noinit + eventrecorder.o(i.EventRecorderInitialize) refers to eventrecorder.o(.constdata) for .constdata + eventrecorder.o(i.EventRecorderStart) refers to eventrecorder.o(i.EventGetTS) for EventGetTS + eventrecorder.o(i.EventRecorderStart) refers to eventrecorder.o(i.EventRecordItem) for EventRecordItem + eventrecorder.o(i.EventRecorderStart) refers to eventrecorder.o(.bss.noinit) for .bss.noinit + eventrecorder.o(i.EventRecorderStop) refers to eventrecorder.o(i.EventGetTS) for EventGetTS + eventrecorder.o(i.EventRecorderStop) refers to eventrecorder.o(i.EventRecordItem) for EventRecordItem + eventrecorder.o(i.EventRecorderStop) refers to eventrecorder.o(.bss.noinit) for .bss.noinit + eventrecorder.o(i.EventRecorderTimerGetFreq) refers to system_lpc17xx.o(.data) for SystemCoreClock + eventrecorder.o(.constdata) refers to eventrecorder.o(.bss.noinit) for EventBuffer + startup_lpc17xx.o(STACK) refers (Special) to heapauxi.o(.text) for __use_two_region_memory + startup_lpc17xx.o(HEAP) refers (Special) to heapauxi.o(.text) for __use_two_region_memory + startup_lpc17xx.o(RESET) refers (Special) to heapauxi.o(.text) for __use_two_region_memory + startup_lpc17xx.o(RESET) refers to startup_lpc17xx.o(STACK) for __initial_sp + startup_lpc17xx.o(RESET) refers to startup_lpc17xx.o(.text) for Reset_Handler + startup_lpc17xx.o(RESET) refers to bitband.o(i.SysTick_Handler) for SysTick_Handler + startup_lpc17xx.o(.ARM.__at_0x02FC) refers (Special) to heapauxi.o(.text) for __use_two_region_memory + startup_lpc17xx.o(.text) refers (Special) to heapauxi.o(.text) for __use_two_region_memory + startup_lpc17xx.o(.text) refers to system_lpc17xx.o(i.SystemInit) for SystemInit + startup_lpc17xx.o(.text) refers to __main.o(!!!main) for __main + startup_lpc17xx.o(.text) refers to startup_lpc17xx.o(HEAP) for Heap_Mem + startup_lpc17xx.o(.text) refers to startup_lpc17xx.o(STACK) for Stack_Mem + system_lpc17xx.o(i.SystemCoreClockUpdate) refers to lludivv7m.o(.text) for __aeabi_uldivmod + system_lpc17xx.o(i.SystemCoreClockUpdate) refers to system_lpc17xx.o(.data) for .data + rt_memcpy_v6.o(.text) refers to rt_memcpy_w.o(.text) for __aeabi_memcpy4 + __main.o(!!!main) refers to __rtentry.o(.ARM.Collect$$rtentry$$00000000) for __rt_entry + __rtentry.o(.ARM.Collect$$rtentry$$00000000) refers (Special) to __rtentry2.o(.ARM.Collect$$rtentry$$0000000A) for __rt_entry_li + __rtentry.o(.ARM.Collect$$rtentry$$00000000) refers (Special) to __rtentry2.o(.ARM.Collect$$rtentry$$0000000D) for __rt_entry_main + __rtentry.o(.ARM.Collect$$rtentry$$00000000) refers (Special) to __rtentry2.o(.ARM.Collect$$rtentry$$0000000C) for __rt_entry_postli_1 + __rtentry.o(.ARM.Collect$$rtentry$$00000000) refers (Special) to __rtentry2.o(.ARM.Collect$$rtentry$$00000009) for __rt_entry_postsh_1 + __rtentry.o(.ARM.Collect$$rtentry$$00000000) refers (Special) to __rtentry2.o(.ARM.Collect$$rtentry$$00000002) for __rt_entry_presh_1 + __rtentry.o(.ARM.Collect$$rtentry$$00000000) refers (Special) to __rtentry4.o(.ARM.Collect$$rtentry$$00000004) for __rt_entry_sh + aeabi_ldiv0_sigfpe.o(.text) refers to rt_div0.o(.text) for __rt_div0 + __rtentry2.o(.ARM.Collect$$rtentry$$00000008) refers to boardinit2.o(.text) for _platform_post_stackheap_init + __rtentry2.o(.ARM.Collect$$rtentry$$0000000A) refers to libinit.o(.ARM.Collect$$libinit$$00000000) for __rt_lib_init + __rtentry2.o(.ARM.Collect$$rtentry$$0000000B) refers to boardinit3.o(.text) for _platform_post_lib_init + __rtentry2.o(.ARM.Collect$$rtentry$$0000000D) refers to bitband.o(i.main) for main + __rtentry2.o(.ARM.Collect$$rtentry$$0000000D) refers to exit.o(.text) for exit + __rtentry2.o(.ARM.exidx) refers to __rtentry2.o(.ARM.Collect$$rtentry$$00000001) for .ARM.Collect$$rtentry$$00000001 + __rtentry2.o(.ARM.exidx) refers to __rtentry2.o(.ARM.Collect$$rtentry$$00000008) for .ARM.Collect$$rtentry$$00000008 + __rtentry2.o(.ARM.exidx) refers to __rtentry2.o(.ARM.Collect$$rtentry$$0000000A) for .ARM.Collect$$rtentry$$0000000A + __rtentry2.o(.ARM.exidx) refers to __rtentry2.o(.ARM.Collect$$rtentry$$0000000B) for .ARM.Collect$$rtentry$$0000000B + __rtentry2.o(.ARM.exidx) refers to __rtentry2.o(.ARM.Collect$$rtentry$$0000000D) for .ARM.Collect$$rtentry$$0000000D + __rtentry4.o(.ARM.Collect$$rtentry$$00000004) refers to sys_stackheap_outer.o(.text) for __user_setup_stackheap + __rtentry4.o(.ARM.exidx) refers to __rtentry4.o(.ARM.Collect$$rtentry$$00000004) for .ARM.Collect$$rtentry$$00000004 + rt_div0.o(.text) refers to defsig_fpe_outer.o(.text) for __rt_SIGFPE + sys_stackheap_outer.o(.text) refers to libspace.o(.text) for __user_perproc_libspace + sys_stackheap_outer.o(.text) refers to startup_lpc17xx.o(.text) for __user_initial_stackheap + exit.o(.text) refers to rtexit.o(.ARM.Collect$$rtexit$$00000000) for __rt_exit + defsig_fpe_outer.o(.text) refers to defsig_fpe_inner.o(.text) for __rt_SIGFPE_inner + defsig_fpe_outer.o(.text) refers to defsig_exit.o(.text) for __sig_exit + defsig_fpe_formal.o(.text) refers to rt_raise.o(.text) for __rt_raise + libinit.o(.ARM.Collect$$libinit$$00000000) refers (Special) to libinit2.o(.ARM.Collect$$libinit$$0000002E) for __rt_lib_init_alloca_1 + libinit.o(.ARM.Collect$$libinit$$00000000) refers (Special) to libinit2.o(.ARM.Collect$$libinit$$0000002C) for __rt_lib_init_argv_1 + libinit.o(.ARM.Collect$$libinit$$00000000) refers (Special) to libinit2.o(.ARM.Collect$$libinit$$0000001B) for __rt_lib_init_atexit_1 + libinit.o(.ARM.Collect$$libinit$$00000000) refers (Special) to libinit2.o(.ARM.Collect$$libinit$$00000021) for __rt_lib_init_clock_1 + libinit.o(.ARM.Collect$$libinit$$00000000) refers (Special) to libinit2.o(.ARM.Collect$$libinit$$00000032) for __rt_lib_init_cpp_1 + libinit.o(.ARM.Collect$$libinit$$00000000) refers (Special) to libinit2.o(.ARM.Collect$$libinit$$00000030) for __rt_lib_init_exceptions_1 + libinit.o(.ARM.Collect$$libinit$$00000000) refers (Special) to libinit2.o(.ARM.Collect$$libinit$$00000002) for __rt_lib_init_fp_1 + libinit.o(.ARM.Collect$$libinit$$00000000) refers (Special) to libinit2.o(.ARM.Collect$$libinit$$0000001F) for __rt_lib_init_fp_trap_1 + libinit.o(.ARM.Collect$$libinit$$00000000) refers (Special) to libinit2.o(.ARM.Collect$$libinit$$00000023) for __rt_lib_init_getenv_1 + libinit.o(.ARM.Collect$$libinit$$00000000) refers (Special) to libinit2.o(.ARM.Collect$$libinit$$0000000A) for __rt_lib_init_heap_1 + libinit.o(.ARM.Collect$$libinit$$00000000) refers (Special) to libinit2.o(.ARM.Collect$$libinit$$00000011) for __rt_lib_init_lc_collate_1 + libinit.o(.ARM.Collect$$libinit$$00000000) refers (Special) to libinit2.o(.ARM.Collect$$libinit$$00000013) for __rt_lib_init_lc_ctype_1 + libinit.o(.ARM.Collect$$libinit$$00000000) refers (Special) to libinit2.o(.ARM.Collect$$libinit$$00000015) for __rt_lib_init_lc_monetary_1 + libinit.o(.ARM.Collect$$libinit$$00000000) refers (Special) to libinit2.o(.ARM.Collect$$libinit$$00000017) for __rt_lib_init_lc_numeric_1 + libinit.o(.ARM.Collect$$libinit$$00000000) refers (Special) to libinit2.o(.ARM.Collect$$libinit$$00000019) for __rt_lib_init_lc_time_1 + libinit.o(.ARM.Collect$$libinit$$00000000) refers (Special) to libinit2.o(.ARM.Collect$$libinit$$00000004) for __rt_lib_init_preinit_1 + libinit.o(.ARM.Collect$$libinit$$00000000) refers (Special) to libinit2.o(.ARM.Collect$$libinit$$0000000E) for __rt_lib_init_rand_1 + libinit.o(.ARM.Collect$$libinit$$00000000) refers (Special) to libinit2.o(.ARM.Collect$$libinit$$00000033) for __rt_lib_init_return + libinit.o(.ARM.Collect$$libinit$$00000000) refers (Special) to libinit2.o(.ARM.Collect$$libinit$$0000001D) for __rt_lib_init_signal_1 + libinit.o(.ARM.Collect$$libinit$$00000000) refers (Special) to libinit2.o(.ARM.Collect$$libinit$$00000025) for __rt_lib_init_stdio_1 + libinit.o(.ARM.Collect$$libinit$$00000000) refers (Special) to libinit2.o(.ARM.Collect$$libinit$$0000000C) for __rt_lib_init_user_alloc_1 + libspace.o(.text) refers to libspace.o(.bss) for __libspace_start + rtexit.o(.ARM.Collect$$rtexit$$00000000) refers (Special) to rtexit2.o(.ARM.Collect$$rtexit$$00000004) for __rt_exit_exit + rtexit.o(.ARM.Collect$$rtexit$$00000000) refers (Special) to rtexit2.o(.ARM.Collect$$rtexit$$00000003) for __rt_exit_ls + rtexit.o(.ARM.Collect$$rtexit$$00000000) refers (Special) to rtexit2.o(.ARM.Collect$$rtexit$$00000002) for __rt_exit_prels_1 + rtexit.o(.ARM.exidx) refers (Special) to rtexit2.o(.ARM.Collect$$rtexit$$00000004) for __rt_exit_exit + rtexit.o(.ARM.exidx) refers (Special) to rtexit2.o(.ARM.Collect$$rtexit$$00000003) for __rt_exit_ls + rtexit.o(.ARM.exidx) refers (Special) to rtexit2.o(.ARM.Collect$$rtexit$$00000002) for __rt_exit_prels_1 + rtexit.o(.ARM.exidx) refers to rtexit.o(.ARM.Collect$$rtexit$$00000000) for .ARM.Collect$$rtexit$$00000000 + rt_raise.o(.text) refers to __raise.o(.text) for __raise + rt_raise.o(.text) refers to sys_exit.o(.text) for _sys_exit + defsig_exit.o(.text) refers to sys_exit.o(.text) for _sys_exit + defsig_fpe_inner.o(.text) refers to defsig_general.o(.text) for __default_signal_display + libinit2.o(.ARM.Collect$$libinit$$00000010) refers to libinit2.o(.ARM.Collect$$libinit$$0000000F) for .ARM.Collect$$libinit$$0000000F + libinit2.o(.ARM.Collect$$libinit$$00000012) refers to libinit2.o(.ARM.Collect$$libinit$$0000000F) for .ARM.Collect$$libinit$$0000000F + libinit2.o(.ARM.Collect$$libinit$$00000014) refers to libinit2.o(.ARM.Collect$$libinit$$0000000F) for .ARM.Collect$$libinit$$0000000F + libinit2.o(.ARM.Collect$$libinit$$00000016) refers to libinit2.o(.ARM.Collect$$libinit$$0000000F) for .ARM.Collect$$libinit$$0000000F + libinit2.o(.ARM.Collect$$libinit$$00000018) refers to libinit2.o(.ARM.Collect$$libinit$$0000000F) for .ARM.Collect$$libinit$$0000000F + libinit2.o(.ARM.Collect$$libinit$$00000026) refers to argv_veneer.o(.emb_text) for __ARM_argv_veneer + libinit2.o(.ARM.Collect$$libinit$$00000027) refers to argv_veneer.o(.emb_text) for __ARM_argv_veneer + sys_exit.o(.text) refers (Special) to use_no_semi.o(.text) for __I$use$semihosting + sys_exit.o(.text) refers (Special) to indicate_semi.o(.text) for __semihosting_library_function + rtexit2.o(.ARM.Collect$$rtexit$$00000003) refers to libshutdown.o(.ARM.Collect$$libshutdown$$00000000) for __rt_lib_shutdown + rtexit2.o(.ARM.Collect$$rtexit$$00000004) refers to sys_exit.o(.text) for _sys_exit + rtexit2.o(.ARM.exidx) refers to rtexit2.o(.ARM.Collect$$rtexit$$00000001) for .ARM.Collect$$rtexit$$00000001 + rtexit2.o(.ARM.exidx) refers to rtexit2.o(.ARM.Collect$$rtexit$$00000003) for .ARM.Collect$$rtexit$$00000003 + rtexit2.o(.ARM.exidx) refers to rtexit2.o(.ARM.Collect$$rtexit$$00000004) for .ARM.Collect$$rtexit$$00000004 + __raise.o(.text) refers to defsig.o(CL$$defsig) for __default_signal_handler + defsig_general.o(.text) refers to sys_wrch.o(.text) for _ttywrch + argv_veneer.o(.emb_text) refers to no_argv.o(.text) for __ARM_get_argv + sys_wrch.o(.text) refers (Special) to use_no_semi.o(.text) for __I$use$semihosting + sys_wrch.o(.text) refers (Special) to indicate_semi.o(.text) for __semihosting_library_function + defsig.o(CL$$defsig) refers to defsig_fpe_inner.o(.text) for __rt_SIGFPE_inner + defsig.o(CL$$defsig) refers to defsig_rtmem_inner.o(.text) for __rt_SIGRTMEM_inner + _get_argv_nomalloc.o(.text) refers (Special) to hrguard.o(.text) for __heap_region$guard + _get_argv_nomalloc.o(.text) refers to defsig_rtmem_outer.o(.text) for __rt_SIGRTMEM + _get_argv_nomalloc.o(.text) refers to sys_command.o(.text) for _sys_command_string + libshutdown.o(.ARM.Collect$$libshutdown$$00000000) refers (Special) to libshutdown2.o(.ARM.Collect$$libshutdown$$00000002) for __rt_lib_shutdown_cpp_1 + libshutdown.o(.ARM.Collect$$libshutdown$$00000000) refers (Special) to libshutdown2.o(.ARM.Collect$$libshutdown$$00000007) for __rt_lib_shutdown_fp_trap_1 + libshutdown.o(.ARM.Collect$$libshutdown$$00000000) refers (Special) to libshutdown2.o(.ARM.Collect$$libshutdown$$0000000F) for __rt_lib_shutdown_heap_1 + libshutdown.o(.ARM.Collect$$libshutdown$$00000000) refers (Special) to libshutdown2.o(.ARM.Collect$$libshutdown$$00000010) for __rt_lib_shutdown_return + libshutdown.o(.ARM.Collect$$libshutdown$$00000000) refers (Special) to libshutdown2.o(.ARM.Collect$$libshutdown$$0000000A) for __rt_lib_shutdown_signal_1 + libshutdown.o(.ARM.Collect$$libshutdown$$00000000) refers (Special) to libshutdown2.o(.ARM.Collect$$libshutdown$$00000004) for __rt_lib_shutdown_stdio_1 + libshutdown.o(.ARM.Collect$$libshutdown$$00000000) refers (Special) to libshutdown2.o(.ARM.Collect$$libshutdown$$0000000C) for __rt_lib_shutdown_user_alloc_1 + sys_command.o(.text) refers (Special) to use_no_semi.o(.text) for __I$use$semihosting + sys_command.o(.text) refers (Special) to indicate_semi.o(.text) for __semihosting_library_function + defsig_abrt_inner.o(.text) refers to defsig_general.o(.text) for __default_signal_display + defsig_rtred_inner.o(.text) refers to defsig_general.o(.text) for __default_signal_display + defsig_rtmem_inner.o(.text) refers to defsig_general.o(.text) for __default_signal_display + defsig_rtmem_outer.o(.text) refers to defsig_rtmem_inner.o(.text) for __rt_SIGRTMEM_inner + defsig_rtmem_outer.o(.text) refers to defsig_exit.o(.text) for __sig_exit + defsig_rtmem_formal.o(.text) refers to rt_raise.o(.text) for __rt_raise + defsig_stak_inner.o(.text) refers to defsig_general.o(.text) for __default_signal_display + defsig_pvfn_inner.o(.text) refers to defsig_general.o(.text) for __default_signal_display + defsig_cppl_inner.o(.text) refers to defsig_general.o(.text) for __default_signal_display + defsig_segv_inner.o(.text) refers to defsig_general.o(.text) for __default_signal_display + defsig_other.o(.text) refers to defsig_general.o(.text) for __default_signal_display + + +============================================================================== + +Removing Unused input sections from the image. + + Removing bitband.o(.rev16_text), (4 bytes). + Removing bitband.o(.revsh_text), (4 bytes). + Removing bitband.o(.rrx_text), (6 bytes). + Removing bitband.o(i.fputc), (28 bytes). + Removing bitband.o(.data), (4 bytes). + Removing bitband.o(.data), (4 bytes). + Removing glcd_spi_lpc1700.o(.rev16_text), (4 bytes). + Removing glcd_spi_lpc1700.o(.revsh_text), (4 bytes). + Removing glcd_spi_lpc1700.o(.rrx_text), (6 bytes). + Removing glcd_spi_lpc1700.o(i.GLCD_Bargraph), (88 bytes). + Removing glcd_spi_lpc1700.o(i.GLCD_Bitmap), (72 bytes). + Removing glcd_spi_lpc1700.o(i.GLCD_ClearLn), (72 bytes). + Removing glcd_spi_lpc1700.o(i.GLCD_PutPixel), (124 bytes). + Removing glcd_spi_lpc1700.o(i.GLCD_ScrollVertical), (2 bytes). + Removing glcd_spi_lpc1700.o(i.GLCD_WrCmd), (4 bytes). + Removing glcd_spi_lpc1700.o(i.GLCD_WrReg), (4 bytes). + Removing led_mcb1700.o(.rev16_text), (4 bytes). + Removing led_mcb1700.o(.revsh_text), (4 bytes). + Removing led_mcb1700.o(.rrx_text), (6 bytes). + Removing led_mcb1700.o(i.LED_GetCount), (4 bytes). + Removing led_mcb1700.o(i.LED_Initialize), (72 bytes). + Removing led_mcb1700.o(i.LED_Off), (40 bytes). + Removing led_mcb1700.o(i.LED_On), (40 bytes). + Removing led_mcb1700.o(i.LED_SetOut), (38 bytes). + Removing led_mcb1700.o(i.LED_Uninitialize), (44 bytes). + Removing led_mcb1700.o(.constdata), (16 bytes). + Removing eventrecorder.o(.rev16_text), (4 bytes). + Removing eventrecorder.o(.revsh_text), (4 bytes). + Removing eventrecorder.o(.rrx_text), (6 bytes). + Removing eventrecorder.o(.emb_text), (116 bytes). + Removing eventrecorder.o(i.EventCheckFilter), (36 bytes). + Removing eventrecorder.o(i.EventGetTS), (52 bytes). + Removing eventrecorder.o(i.EventRecord2), (56 bytes). + Removing eventrecorder.o(i.EventRecord4), (112 bytes). + Removing eventrecorder.o(i.EventRecordData), (248 bytes). + Removing eventrecorder.o(i.EventRecordItem), (172 bytes). + Removing eventrecorder.o(i.EventRecorderClockUpdate), (40 bytes). + Removing eventrecorder.o(i.EventRecorderDisable), (92 bytes). + Removing eventrecorder.o(i.EventRecorderEnable), (92 bytes). + Removing eventrecorder.o(i.EventRecorderInitialize), (264 bytes). + Removing eventrecorder.o(i.EventRecorderStart), (44 bytes). + Removing eventrecorder.o(i.EventRecorderStop), (40 bytes). + Removing eventrecorder.o(i.EventRecorderTimerGetCount), (12 bytes). + Removing eventrecorder.o(i.EventRecorderTimerGetFreq), (12 bytes). + Removing eventrecorder.o(i.EventRecorderTimerSetup), (32 bytes). + Removing gpio_lpc17xx.o(.rev16_text), (4 bytes). + Removing gpio_lpc17xx.o(.revsh_text), (4 bytes). + Removing gpio_lpc17xx.o(.rrx_text), (6 bytes). + Removing gpio_lpc17xx.o(i.GPIO_PinRead), (24 bytes). + Removing gpio_lpc17xx.o(i.GPIO_PinWrite), (24 bytes). + Removing gpio_lpc17xx.o(i.GPIO_PortClock), (28 bytes). + Removing gpio_lpc17xx.o(i.GPIO_PortRead), (16 bytes). + Removing gpio_lpc17xx.o(i.GPIO_PortWrite), (20 bytes). + Removing gpio_lpc17xx.o(i.GPIO_SetDir), (32 bytes). + Removing pin_lpc17xx.o(.rev16_text), (4 bytes). + Removing pin_lpc17xx.o(.revsh_text), (4 bytes). + Removing pin_lpc17xx.o(.rrx_text), (6 bytes). + Removing pin_lpc17xx.o(i.PIN_Configure), (104 bytes). + Removing pin_lpc17xx.o(i.PIN_ConfigureI2C0Pins), (28 bytes). + Removing pin_lpc17xx.o(i.PIN_ConfigureTPIU), (28 bytes). + Removing system_lpc17xx.o(.rev16_text), (4 bytes). + Removing system_lpc17xx.o(.revsh_text), (4 bytes). + Removing system_lpc17xx.o(.rrx_text), (6 bytes). + Removing system_lpc17xx.o(i.SystemCoreClockUpdate), (208 bytes). + Removing system_lpc17xx.o(.data), (4 bytes). + +65 unused section(s) (total 2690 bytes) removed from the image. + +============================================================================== + +Image Symbol Table + + Local Symbols + + Symbol Name Value Ov Type Size Object(Section) + + RESET 0x00000000 Section 204 startup_lpc17xx.o(RESET) + ../clib/angel/boardlib.s 0x00000000 Number 0 boardinit2.o ABSOLUTE + ../clib/angel/boardlib.s 0x00000000 Number 0 boardshut.o ABSOLUTE + ../clib/angel/boardlib.s 0x00000000 Number 0 boardinit1.o ABSOLUTE + ../clib/angel/boardlib.s 0x00000000 Number 0 boardinit3.o ABSOLUTE + ../clib/angel/handlers.s 0x00000000 Number 0 __scatter_copy.o ABSOLUTE + ../clib/angel/handlers.s 0x00000000 Number 0 __scatter_zi.o ABSOLUTE + ../clib/angel/kernel.s 0x00000000 Number 0 __rtentry2.o ABSOLUTE + ../clib/angel/kernel.s 0x00000000 Number 0 rtexit2.o ABSOLUTE + ../clib/angel/kernel.s 0x00000000 Number 0 rtexit.o ABSOLUTE + ../clib/angel/kernel.s 0x00000000 Number 0 __rtentry.o ABSOLUTE + ../clib/angel/kernel.s 0x00000000 Number 0 __rtentry4.o ABSOLUTE + ../clib/angel/rt.s 0x00000000 Number 0 aeabi_ldiv0.o ABSOLUTE + ../clib/angel/rt.s 0x00000000 Number 0 aeabi_ldiv0_sigfpe.o ABSOLUTE + ../clib/angel/rt.s 0x00000000 Number 0 rt_div0.o ABSOLUTE + ../clib/angel/rt.s 0x00000000 Number 0 rt_raise.o ABSOLUTE + ../clib/angel/scatter.s 0x00000000 Number 0 __scatter.o ABSOLUTE + ../clib/angel/startup.s 0x00000000 Number 0 __main.o ABSOLUTE + ../clib/angel/sys.s 0x00000000 Number 0 sys_stackheap_outer.o ABSOLUTE + ../clib/angel/sys.s 0x00000000 Number 0 use_no_semi.o ABSOLUTE + ../clib/angel/sys.s 0x00000000 Number 0 indicate_semi.o ABSOLUTE + ../clib/angel/sys.s 0x00000000 Number 0 libspace.o ABSOLUTE + ../clib/angel/sysapp.c 0x00000000 Number 0 sys_wrch.o ABSOLUTE + ../clib/angel/sysapp.c 0x00000000 Number 0 sys_exit.o ABSOLUTE + ../clib/angel/sysapp.c 0x00000000 Number 0 sys_command.o ABSOLUTE + ../clib/armsys.c 0x00000000 Number 0 argv_veneer.o ABSOLUTE + ../clib/armsys.c 0x00000000 Number 0 no_argv.o ABSOLUTE + ../clib/armsys.c 0x00000000 Number 0 argv_veneer.o ABSOLUTE + ../clib/armsys.c 0x00000000 Number 0 _get_argv_nomalloc.o ABSOLUTE + ../clib/heapalloc.c 0x00000000 Number 0 hrguard.o ABSOLUTE + ../clib/heapaux.c 0x00000000 Number 0 heapauxi.o ABSOLUTE + ../clib/libinit.s 0x00000000 Number 0 libshutdown.o ABSOLUTE + ../clib/libinit.s 0x00000000 Number 0 libinit2.o ABSOLUTE + ../clib/libinit.s 0x00000000 Number 0 libshutdown2.o ABSOLUTE + ../clib/libinit.s 0x00000000 Number 0 libinit.o ABSOLUTE + ../clib/longlong.s 0x00000000 Number 0 lludivv7m.o ABSOLUTE + ../clib/memcpset.s 0x00000000 Number 0 rt_memcpy_w.o ABSOLUTE + ../clib/memcpset.s 0x00000000 Number 0 rt_memcpy_v6.o ABSOLUTE + ../clib/memcpset.s 0x00000000 Number 0 rt_memclr_w.o ABSOLUTE + ../clib/signal.c 0x00000000 Number 0 defsig_general.o ABSOLUTE + ../clib/signal.c 0x00000000 Number 0 __raise.o ABSOLUTE + ../clib/signal.c 0x00000000 Number 0 defsig_rtred_inner.o ABSOLUTE + ../clib/signal.c 0x00000000 Number 0 defsig_rtmem_inner.o ABSOLUTE + ../clib/signal.c 0x00000000 Number 0 defsig_fpe_outer.o ABSOLUTE + ../clib/signal.c 0x00000000 Number 0 defsig_exit.o ABSOLUTE + ../clib/signal.c 0x00000000 Number 0 defsig_rtmem_formal.o ABSOLUTE + ../clib/signal.c 0x00000000 Number 0 defsig_fpe_formal.o ABSOLUTE + ../clib/signal.c 0x00000000 Number 0 defsig_abrt_inner.o ABSOLUTE + ../clib/signal.c 0x00000000 Number 0 defsig_other.o ABSOLUTE + ../clib/signal.c 0x00000000 Number 0 defsig_fpe_inner.o ABSOLUTE + ../clib/signal.c 0x00000000 Number 0 defsig_rtmem_outer.o ABSOLUTE + ../clib/signal.c 0x00000000 Number 0 defsig_segv_inner.o ABSOLUTE + ../clib/signal.c 0x00000000 Number 0 defsig_pvfn_inner.o ABSOLUTE + ../clib/signal.c 0x00000000 Number 0 defsig_stak_inner.o ABSOLUTE + ../clib/signal.c 0x00000000 Number 0 defsig_cppl_inner.o ABSOLUTE + ../clib/signal.s 0x00000000 Number 0 defsig.o ABSOLUTE + ../clib/stdlib.c 0x00000000 Number 0 exit.o ABSOLUTE + ../fplib/fpinit.s 0x00000000 Number 0 fpinit.o ABSOLUTE + ..\\lab1\\Boards\\Keil\\MCB1700\\Blinky_ULp\\GLCD_SPI_LPC1700.c 0x00000000 Number 0 glcd_spi_lpc1700.o ABSOLUTE + ..\lab1\Boards\Keil\MCB1700\Blinky_ULp\GLCD_SPI_LPC1700.c 0x00000000 Number 0 glcd_spi_lpc1700.o ABSOLUTE + C:\Users\ECBME\AppData\Local\Arm\Packs\Keil\ARM_Compiler\1.6.3\Source\EventRecorder.c 0x00000000 Number 0 eventrecorder.o ABSOLUTE + C:\Users\ECBME\AppData\Local\Arm\Packs\Keil\LPC1700_DFP\2.6.0\Boards\Keil\MCB1700\Common\LED_MCB1700.c 0x00000000 Number 0 led_mcb1700.o ABSOLUTE + C:\Users\ECBME\AppData\Local\Arm\Packs\Keil\LPC1700_DFP\2.6.0\RTE_Driver\GPIO_LPC17xx.c 0x00000000 Number 0 gpio_lpc17xx.o ABSOLUTE + C:\Users\ECBME\AppData\Local\Arm\Packs\Keil\LPC1700_DFP\2.6.0\RTE_Driver\PIN_LPC17xx.c 0x00000000 Number 0 pin_lpc17xx.o ABSOLUTE + C:\\Users\\ECBME\\AppData\\Local\\Arm\\Packs\\Keil\\ARM_Compiler\\1.6.3\\Source\\EventRecorder.c 0x00000000 Number 0 eventrecorder.o ABSOLUTE + C:\\Users\\ECBME\\AppData\\Local\\Arm\\Packs\\Keil\\LPC1700_DFP\\2.6.0\\Boards\\Keil\\MCB1700\\Common\\LED_MCB1700.c 0x00000000 Number 0 led_mcb1700.o ABSOLUTE + C:\\Users\\ECBME\\AppData\\Local\\Arm\\Packs\\Keil\\LPC1700_DFP\\2.6.0\\RTE_Driver\\GPIO_LPC17xx.c 0x00000000 Number 0 gpio_lpc17xx.o ABSOLUTE + C:\\Users\\ECBME\\AppData\\Local\\Arm\\Packs\\Keil\\LPC1700_DFP\\2.6.0\\RTE_Driver\\PIN_LPC17xx.c 0x00000000 Number 0 pin_lpc17xx.o ABSOLUTE + RTE\Device\LPC1768\startup_LPC17xx.s 0x00000000 Number 0 startup_lpc17xx.o ABSOLUTE + RTE\Device\LPC1768\system_LPC17xx.c 0x00000000 Number 0 system_lpc17xx.o ABSOLUTE + RTE\\Device\\LPC1768\\system_LPC17xx.c 0x00000000 Number 0 system_lpc17xx.o ABSOLUTE + bitbanding\\bitband.c 0x00000000 Number 0 bitband.o ABSOLUTE + bitbanding\bitband.c 0x00000000 Number 0 bitband.o ABSOLUTE + dc.s 0x00000000 Number 0 dc.o ABSOLUTE + !!!main 0x000000cc Section 8 __main.o(!!!main) + !!!scatter 0x000000d4 Section 52 __scatter.o(!!!scatter) + !!handler_copy 0x00000108 Section 26 __scatter_copy.o(!!handler_copy) + !!handler_zi 0x00000124 Section 28 __scatter_zi.o(!!handler_zi) + .ARM.Collect$$libinit$$00000000 0x00000140 Section 2 libinit.o(.ARM.Collect$$libinit$$00000000) + .ARM.Collect$$libinit$$00000002 0x00000142 Section 0 libinit2.o(.ARM.Collect$$libinit$$00000002) + .ARM.Collect$$libinit$$00000004 0x00000142 Section 0 libinit2.o(.ARM.Collect$$libinit$$00000004) + .ARM.Collect$$libinit$$0000000A 0x00000142 Section 0 libinit2.o(.ARM.Collect$$libinit$$0000000A) + .ARM.Collect$$libinit$$0000000C 0x00000142 Section 0 libinit2.o(.ARM.Collect$$libinit$$0000000C) + .ARM.Collect$$libinit$$0000000E 0x00000142 Section 0 libinit2.o(.ARM.Collect$$libinit$$0000000E) + .ARM.Collect$$libinit$$00000011 0x00000142 Section 0 libinit2.o(.ARM.Collect$$libinit$$00000011) + .ARM.Collect$$libinit$$00000013 0x00000142 Section 0 libinit2.o(.ARM.Collect$$libinit$$00000013) + .ARM.Collect$$libinit$$00000015 0x00000142 Section 0 libinit2.o(.ARM.Collect$$libinit$$00000015) + .ARM.Collect$$libinit$$00000017 0x00000142 Section 0 libinit2.o(.ARM.Collect$$libinit$$00000017) + .ARM.Collect$$libinit$$00000019 0x00000142 Section 0 libinit2.o(.ARM.Collect$$libinit$$00000019) + .ARM.Collect$$libinit$$0000001B 0x00000142 Section 0 libinit2.o(.ARM.Collect$$libinit$$0000001B) + .ARM.Collect$$libinit$$0000001D 0x00000142 Section 0 libinit2.o(.ARM.Collect$$libinit$$0000001D) + .ARM.Collect$$libinit$$0000001F 0x00000142 Section 0 libinit2.o(.ARM.Collect$$libinit$$0000001F) + .ARM.Collect$$libinit$$00000021 0x00000142 Section 0 libinit2.o(.ARM.Collect$$libinit$$00000021) + .ARM.Collect$$libinit$$00000023 0x00000142 Section 0 libinit2.o(.ARM.Collect$$libinit$$00000023) + .ARM.Collect$$libinit$$00000025 0x00000142 Section 0 libinit2.o(.ARM.Collect$$libinit$$00000025) + .ARM.Collect$$libinit$$0000002C 0x00000142 Section 0 libinit2.o(.ARM.Collect$$libinit$$0000002C) + .ARM.Collect$$libinit$$0000002E 0x00000142 Section 0 libinit2.o(.ARM.Collect$$libinit$$0000002E) + .ARM.Collect$$libinit$$00000030 0x00000142 Section 0 libinit2.o(.ARM.Collect$$libinit$$00000030) + .ARM.Collect$$libinit$$00000032 0x00000142 Section 0 libinit2.o(.ARM.Collect$$libinit$$00000032) + .ARM.Collect$$libinit$$00000033 0x00000142 Section 2 libinit2.o(.ARM.Collect$$libinit$$00000033) + .ARM.Collect$$libshutdown$$00000000 0x00000144 Section 2 libshutdown.o(.ARM.Collect$$libshutdown$$00000000) + .ARM.Collect$$libshutdown$$00000002 0x00000146 Section 0 libshutdown2.o(.ARM.Collect$$libshutdown$$00000002) + .ARM.Collect$$libshutdown$$00000004 0x00000146 Section 0 libshutdown2.o(.ARM.Collect$$libshutdown$$00000004) + .ARM.Collect$$libshutdown$$00000007 0x00000146 Section 0 libshutdown2.o(.ARM.Collect$$libshutdown$$00000007) + .ARM.Collect$$libshutdown$$0000000A 0x00000146 Section 0 libshutdown2.o(.ARM.Collect$$libshutdown$$0000000A) + .ARM.Collect$$libshutdown$$0000000C 0x00000146 Section 0 libshutdown2.o(.ARM.Collect$$libshutdown$$0000000C) + .ARM.Collect$$libshutdown$$0000000F 0x00000146 Section 0 libshutdown2.o(.ARM.Collect$$libshutdown$$0000000F) + .ARM.Collect$$libshutdown$$00000010 0x00000146 Section 2 libshutdown2.o(.ARM.Collect$$libshutdown$$00000010) + .ARM.Collect$$rtentry$$00000000 0x00000148 Section 0 __rtentry.o(.ARM.Collect$$rtentry$$00000000) + .ARM.Collect$$rtentry$$00000002 0x00000148 Section 0 __rtentry2.o(.ARM.Collect$$rtentry$$00000002) + .ARM.Collect$$rtentry$$00000004 0x00000148 Section 6 __rtentry4.o(.ARM.Collect$$rtentry$$00000004) + .ARM.Collect$$rtentry$$00000009 0x0000014e Section 0 __rtentry2.o(.ARM.Collect$$rtentry$$00000009) + .ARM.Collect$$rtentry$$0000000A 0x0000014e Section 4 __rtentry2.o(.ARM.Collect$$rtentry$$0000000A) + .ARM.Collect$$rtentry$$0000000C 0x00000152 Section 0 __rtentry2.o(.ARM.Collect$$rtentry$$0000000C) + .ARM.Collect$$rtentry$$0000000D 0x00000152 Section 8 __rtentry2.o(.ARM.Collect$$rtentry$$0000000D) + .ARM.Collect$$rtexit$$00000000 0x0000015a Section 2 rtexit.o(.ARM.Collect$$rtexit$$00000000) + .ARM.Collect$$rtexit$$00000002 0x0000015c Section 0 rtexit2.o(.ARM.Collect$$rtexit$$00000002) + .ARM.Collect$$rtexit$$00000003 0x0000015c Section 4 rtexit2.o(.ARM.Collect$$rtexit$$00000003) + .ARM.Collect$$rtexit$$00000004 0x00000160 Section 6 rtexit2.o(.ARM.Collect$$rtexit$$00000004) + .text 0x00000168 Section 60 startup_lpc17xx.o(.text) + .text 0x000001a4 Section 0 heapauxi.o(.text) + .text 0x000001aa Section 74 sys_stackheap_outer.o(.text) + .text 0x000001f4 Section 0 exit.o(.text) + .text 0x00000208 Section 8 libspace.o(.text) + .text 0x00000210 Section 0 sys_exit.o(.text) + .text 0x0000021c Section 2 use_no_semi.o(.text) + .text 0x0000021e Section 0 indicate_semi.o(.text) + i.GLCD_Clear 0x00000220 Section 0 glcd_spi_lpc1700.o(i.GLCD_Clear) + i.GLCD_DisplayChar 0x00000250 Section 0 glcd_spi_lpc1700.o(i.GLCD_DisplayChar) + i.GLCD_DisplayString 0x0000029c Section 0 glcd_spi_lpc1700.o(i.GLCD_DisplayString) + i.GLCD_SetBackColor 0x000002c4 Section 0 glcd_spi_lpc1700.o(i.GLCD_SetBackColor) + i.GLCD_SetTextColor 0x000002d0 Section 0 glcd_spi_lpc1700.o(i.GLCD_SetTextColor) + i.GLCD_WindowMax 0x000002dc Section 0 glcd_spi_lpc1700.o(i.GLCD_WindowMax) + i.delay 0x000002ea Section 0 glcd_spi_lpc1700.o(i.delay) + delay 0x000002eb Thumb Code 8 glcd_spi_lpc1700.o(i.delay) + .ARM.__at_0x02FC 0x000002fc Section 4 startup_lpc17xx.o(.ARM.__at_0x02FC) + i.GLCD_DrawChar 0x00000300 Section 0 glcd_spi_lpc1700.o(i.GLCD_DrawChar) + i.GLCD_Init 0x00000390 Section 0 glcd_spi_lpc1700.o(i.GLCD_Init) + i.GLCD_SetWindow 0x00000954 Section 0 glcd_spi_lpc1700.o(i.GLCD_SetWindow) + i.SysTick_Handler 0x000009ec Section 0 bitband.o(i.SysTick_Handler) + i.SystemInit 0x00000a94 Section 0 system_lpc17xx.o(i.SystemInit) + i.main 0x00000b60 Section 0 bitband.o(i.main) + i.method2lcd 0x00000c48 Section 0 bitband.o(i.method2lcd) + method2lcd 0x00000c49 Thumb Code 12 bitband.o(i.method2lcd) + i.rd_id_man 0x00000c54 Section 0 glcd_spi_lpc1700.o(i.rd_id_man) + rd_id_man 0x00000c55 Thumb Code 104 glcd_spi_lpc1700.o(i.rd_id_man) + i.spi_tran 0x00000cc4 Section 0 glcd_spi_lpc1700.o(i.spi_tran) + spi_tran 0x00000cc5 Thumb Code 16 glcd_spi_lpc1700.o(i.spi_tran) + i.spi_tran_man 0x00000cd8 Section 0 glcd_spi_lpc1700.o(i.spi_tran_man) + spi_tran_man 0x00000cd9 Thumb Code 106 glcd_spi_lpc1700.o(i.spi_tran_man) + i.wr_cmd 0x00000d48 Section 0 glcd_spi_lpc1700.o(i.wr_cmd) + wr_cmd 0x00000d49 Thumb Code 32 glcd_spi_lpc1700.o(i.wr_cmd) + i.wr_dat 0x00000d6c Section 0 glcd_spi_lpc1700.o(i.wr_dat) + wr_dat 0x00000d6d Thumb Code 32 glcd_spi_lpc1700.o(i.wr_dat) + i.wr_dat_only 0x00000d90 Section 0 glcd_spi_lpc1700.o(i.wr_dat_only) + wr_dat_only 0x00000d91 Thumb Code 20 glcd_spi_lpc1700.o(i.wr_dat_only) + i.wr_dat_start 0x00000da4 Section 0 glcd_spi_lpc1700.o(i.wr_dat_start) + wr_dat_start 0x00000da5 Thumb Code 12 glcd_spi_lpc1700.o(i.wr_dat_start) + i.wr_reg 0x00000db4 Section 0 glcd_spi_lpc1700.o(i.wr_reg) + wr_reg 0x00000db5 Thumb Code 18 glcd_spi_lpc1700.o(i.wr_reg) + .constdata 0x00000dc6 Section 6272 glcd_spi_lpc1700.o(.constdata) + .constdata 0x00002648 Section 24 eventrecorder.o(.constdata) + __tagsym$$used 0x00002648 Number 0 eventrecorder.o(.constdata) + .data 0x10000000 Section 12 bitband.o(.data) + state 0x10000000 Data 1 bitband.o(.data) + state 0x10000001 Data 1 bitband.o(.data) + tick 0x10000004 Data 4 bitband.o(.data) + state 0x10000008 Data 4 bitband.o(.data) + .data 0x1000000c Section 6 glcd_spi_lpc1700.o(.data) + Himax 0x1000000c Data 1 glcd_spi_lpc1700.o(.data) + Color 0x1000000e Data 4 glcd_spi_lpc1700.o(.data) + .bss 0x10000014 Section 96 libspace.o(.bss) + .bss.noinit 0x10000080 Section 1188 eventrecorder.o(.bss.noinit) + EventBuffer 0x10000080 Data 1024 eventrecorder.o(.bss.noinit) + EventFilter 0x10000480 Data 128 eventrecorder.o(.bss.noinit) + EventStatus 0x10000500 Data 36 eventrecorder.o(.bss.noinit) + HEAP 0x10000528 Section 0 startup_lpc17xx.o(HEAP) + STACK 0x10000528 Section 512 startup_lpc17xx.o(STACK) + Heap_Mem 0x10000528 Data 0 startup_lpc17xx.o(HEAP) + Stack_Mem 0x10000528 Data 512 startup_lpc17xx.o(STACK) + __initial_sp 0x10000728 Data 0 startup_lpc17xx.o(STACK) + + Global Symbols + + Symbol Name Value Ov Type Size Object(Section) + + BuildAttributes$$THM_ISAv4$P$D$K$B$S$PE$A:L22UL41UL21$X:L11$S22US41US21$IEEE1$IW$USESV6$~STKCKD$USESV7$~SHL$OSPACE$ROPI$EBA8$UX$STANDARDLIB$REQ8$PRES8$EABIv2 0x00000000 Number 0 anon$$obj.o ABSOLUTE + __ARM_use_no_argv 0x00000000 Number 0 bitband.o ABSOLUTE + __Vectors 0x00000000 Data 4 startup_lpc17xx.o(RESET) + __ARM_exceptions_init - Undefined Weak Reference + __alloca_initialize - Undefined Weak Reference + __arm_preinit_ - Undefined Weak Reference + __cpp_initialize__aeabi_ - Undefined Weak Reference + __cxa_finalize - Undefined Weak Reference + __rt_locale - Undefined Weak Reference + __sigvec_lookup - Undefined Weak Reference + _atexit_init - Undefined Weak Reference + _call_atexit_fns - Undefined Weak Reference + _clock_init - Undefined Weak Reference + _fp_trap_init - Undefined Weak Reference + _fp_trap_shutdown - Undefined Weak Reference + _get_lc_collate - Undefined Weak Reference + _get_lc_ctype - Undefined Weak Reference + _get_lc_monetary - Undefined Weak Reference + _get_lc_numeric - Undefined Weak Reference + _get_lc_time - Undefined Weak Reference + _getenv_init - Undefined Weak Reference + _handle_redirection - Undefined Weak Reference + _init_alloc - Undefined Weak Reference + _init_user_alloc - Undefined Weak Reference + _initio - Undefined Weak Reference + _rand_init - Undefined Weak Reference + _signal_finish - Undefined Weak Reference + _signal_init - Undefined Weak Reference + _terminate_alloc - Undefined Weak Reference + _terminate_user_alloc - Undefined Weak Reference + _terminateio - Undefined Weak Reference + __main 0x000000cd Thumb Code 8 __main.o(!!!main) + __scatterload 0x000000d5 Thumb Code 0 __scatter.o(!!!scatter) + __scatterload_rt2 0x000000d5 Thumb Code 44 __scatter.o(!!!scatter) + __scatterload_rt2_thumb_only 0x000000d5 Thumb Code 0 __scatter.o(!!!scatter) + __scatterload_null 0x000000e3 Thumb Code 0 __scatter.o(!!!scatter) + __scatterload_copy 0x00000109 Thumb Code 26 __scatter_copy.o(!!handler_copy) + __scatterload_zeroinit 0x00000125 Thumb Code 28 __scatter_zi.o(!!handler_zi) + __rt_lib_init 0x00000141 Thumb Code 0 libinit.o(.ARM.Collect$$libinit$$00000000) + __rt_lib_init_alloca_1 0x00000143 Thumb Code 0 libinit2.o(.ARM.Collect$$libinit$$0000002E) + __rt_lib_init_argv_1 0x00000143 Thumb Code 0 libinit2.o(.ARM.Collect$$libinit$$0000002C) + __rt_lib_init_atexit_1 0x00000143 Thumb Code 0 libinit2.o(.ARM.Collect$$libinit$$0000001B) + __rt_lib_init_clock_1 0x00000143 Thumb Code 0 libinit2.o(.ARM.Collect$$libinit$$00000021) + __rt_lib_init_cpp_1 0x00000143 Thumb Code 0 libinit2.o(.ARM.Collect$$libinit$$00000032) + __rt_lib_init_exceptions_1 0x00000143 Thumb Code 0 libinit2.o(.ARM.Collect$$libinit$$00000030) + __rt_lib_init_fp_1 0x00000143 Thumb Code 0 libinit2.o(.ARM.Collect$$libinit$$00000002) + __rt_lib_init_fp_trap_1 0x00000143 Thumb Code 0 libinit2.o(.ARM.Collect$$libinit$$0000001F) + __rt_lib_init_getenv_1 0x00000143 Thumb Code 0 libinit2.o(.ARM.Collect$$libinit$$00000023) + __rt_lib_init_heap_1 0x00000143 Thumb Code 0 libinit2.o(.ARM.Collect$$libinit$$0000000A) + __rt_lib_init_lc_collate_1 0x00000143 Thumb Code 0 libinit2.o(.ARM.Collect$$libinit$$00000011) + __rt_lib_init_lc_ctype_1 0x00000143 Thumb Code 0 libinit2.o(.ARM.Collect$$libinit$$00000013) + __rt_lib_init_lc_monetary_1 0x00000143 Thumb Code 0 libinit2.o(.ARM.Collect$$libinit$$00000015) + __rt_lib_init_lc_numeric_1 0x00000143 Thumb Code 0 libinit2.o(.ARM.Collect$$libinit$$00000017) + __rt_lib_init_lc_time_1 0x00000143 Thumb Code 0 libinit2.o(.ARM.Collect$$libinit$$00000019) + __rt_lib_init_preinit_1 0x00000143 Thumb Code 0 libinit2.o(.ARM.Collect$$libinit$$00000004) + __rt_lib_init_rand_1 0x00000143 Thumb Code 0 libinit2.o(.ARM.Collect$$libinit$$0000000E) + __rt_lib_init_return 0x00000143 Thumb Code 0 libinit2.o(.ARM.Collect$$libinit$$00000033) + __rt_lib_init_signal_1 0x00000143 Thumb Code 0 libinit2.o(.ARM.Collect$$libinit$$0000001D) + __rt_lib_init_stdio_1 0x00000143 Thumb Code 0 libinit2.o(.ARM.Collect$$libinit$$00000025) + __rt_lib_init_user_alloc_1 0x00000143 Thumb Code 0 libinit2.o(.ARM.Collect$$libinit$$0000000C) + __rt_lib_shutdown 0x00000145 Thumb Code 0 libshutdown.o(.ARM.Collect$$libshutdown$$00000000) + __rt_lib_shutdown_cpp_1 0x00000147 Thumb Code 0 libshutdown2.o(.ARM.Collect$$libshutdown$$00000002) + __rt_lib_shutdown_fp_trap_1 0x00000147 Thumb Code 0 libshutdown2.o(.ARM.Collect$$libshutdown$$00000007) + __rt_lib_shutdown_heap_1 0x00000147 Thumb Code 0 libshutdown2.o(.ARM.Collect$$libshutdown$$0000000F) + __rt_lib_shutdown_return 0x00000147 Thumb Code 0 libshutdown2.o(.ARM.Collect$$libshutdown$$00000010) + __rt_lib_shutdown_signal_1 0x00000147 Thumb Code 0 libshutdown2.o(.ARM.Collect$$libshutdown$$0000000A) + __rt_lib_shutdown_stdio_1 0x00000147 Thumb Code 0 libshutdown2.o(.ARM.Collect$$libshutdown$$00000004) + __rt_lib_shutdown_user_alloc_1 0x00000147 Thumb Code 0 libshutdown2.o(.ARM.Collect$$libshutdown$$0000000C) + __rt_entry 0x00000149 Thumb Code 0 __rtentry.o(.ARM.Collect$$rtentry$$00000000) + __rt_entry_presh_1 0x00000149 Thumb Code 0 __rtentry2.o(.ARM.Collect$$rtentry$$00000002) + __rt_entry_sh 0x00000149 Thumb Code 0 __rtentry4.o(.ARM.Collect$$rtentry$$00000004) + __rt_entry_li 0x0000014f Thumb Code 0 __rtentry2.o(.ARM.Collect$$rtentry$$0000000A) + __rt_entry_postsh_1 0x0000014f Thumb Code 0 __rtentry2.o(.ARM.Collect$$rtentry$$00000009) + __rt_entry_main 0x00000153 Thumb Code 0 __rtentry2.o(.ARM.Collect$$rtentry$$0000000D) + __rt_entry_postli_1 0x00000153 Thumb Code 0 __rtentry2.o(.ARM.Collect$$rtentry$$0000000C) + __rt_exit 0x0000015b Thumb Code 0 rtexit.o(.ARM.Collect$$rtexit$$00000000) + __rt_exit_ls 0x0000015d Thumb Code 0 rtexit2.o(.ARM.Collect$$rtexit$$00000003) + __rt_exit_prels_1 0x0000015d Thumb Code 0 rtexit2.o(.ARM.Collect$$rtexit$$00000002) + __rt_exit_exit 0x00000161 Thumb Code 0 rtexit2.o(.ARM.Collect$$rtexit$$00000004) + Reset_Handler 0x00000169 Thumb Code 8 startup_lpc17xx.o(.text) + NMI_Handler 0x00000171 Thumb Code 2 startup_lpc17xx.o(.text) + HardFault_Handler 0x00000173 Thumb Code 2 startup_lpc17xx.o(.text) + MemManage_Handler 0x00000175 Thumb Code 2 startup_lpc17xx.o(.text) + BusFault_Handler 0x00000177 Thumb Code 2 startup_lpc17xx.o(.text) + UsageFault_Handler 0x00000179 Thumb Code 2 startup_lpc17xx.o(.text) + SVC_Handler 0x0000017b Thumb Code 2 startup_lpc17xx.o(.text) + DebugMon_Handler 0x0000017d Thumb Code 2 startup_lpc17xx.o(.text) + PendSV_Handler 0x0000017f Thumb Code 2 startup_lpc17xx.o(.text) + ADC_IRQHandler 0x00000183 Thumb Code 0 startup_lpc17xx.o(.text) + BOD_IRQHandler 0x00000183 Thumb Code 0 startup_lpc17xx.o(.text) + CANActivity_IRQHandler 0x00000183 Thumb Code 0 startup_lpc17xx.o(.text) + CAN_IRQHandler 0x00000183 Thumb Code 0 startup_lpc17xx.o(.text) + DMA_IRQHandler 0x00000183 Thumb Code 0 startup_lpc17xx.o(.text) + EINT0_IRQHandler 0x00000183 Thumb Code 0 startup_lpc17xx.o(.text) + EINT1_IRQHandler 0x00000183 Thumb Code 0 startup_lpc17xx.o(.text) + EINT2_IRQHandler 0x00000183 Thumb Code 0 startup_lpc17xx.o(.text) + EINT3_IRQHandler 0x00000183 Thumb Code 0 startup_lpc17xx.o(.text) + ENET_IRQHandler 0x00000183 Thumb Code 0 startup_lpc17xx.o(.text) + I2C0_IRQHandler 0x00000183 Thumb Code 0 startup_lpc17xx.o(.text) + I2C1_IRQHandler 0x00000183 Thumb Code 0 startup_lpc17xx.o(.text) + I2C2_IRQHandler 0x00000183 Thumb Code 0 startup_lpc17xx.o(.text) + I2S_IRQHandler 0x00000183 Thumb Code 0 startup_lpc17xx.o(.text) + MCPWM_IRQHandler 0x00000183 Thumb Code 0 startup_lpc17xx.o(.text) + PLL0_IRQHandler 0x00000183 Thumb Code 0 startup_lpc17xx.o(.text) + PLL1_IRQHandler 0x00000183 Thumb Code 0 startup_lpc17xx.o(.text) + PWM1_IRQHandler 0x00000183 Thumb Code 0 startup_lpc17xx.o(.text) + QEI_IRQHandler 0x00000183 Thumb Code 0 startup_lpc17xx.o(.text) + RIT_IRQHandler 0x00000183 Thumb Code 0 startup_lpc17xx.o(.text) + RTC_IRQHandler 0x00000183 Thumb Code 0 startup_lpc17xx.o(.text) + SPI_IRQHandler 0x00000183 Thumb Code 0 startup_lpc17xx.o(.text) + SSP0_IRQHandler 0x00000183 Thumb Code 0 startup_lpc17xx.o(.text) + SSP1_IRQHandler 0x00000183 Thumb Code 0 startup_lpc17xx.o(.text) + TIMER0_IRQHandler 0x00000183 Thumb Code 0 startup_lpc17xx.o(.text) + TIMER1_IRQHandler 0x00000183 Thumb Code 0 startup_lpc17xx.o(.text) + TIMER2_IRQHandler 0x00000183 Thumb Code 0 startup_lpc17xx.o(.text) + TIMER3_IRQHandler 0x00000183 Thumb Code 0 startup_lpc17xx.o(.text) + UART0_IRQHandler 0x00000183 Thumb Code 0 startup_lpc17xx.o(.text) + UART1_IRQHandler 0x00000183 Thumb Code 0 startup_lpc17xx.o(.text) + UART2_IRQHandler 0x00000183 Thumb Code 0 startup_lpc17xx.o(.text) + UART3_IRQHandler 0x00000183 Thumb Code 0 startup_lpc17xx.o(.text) + USBActivity_IRQHandler 0x00000183 Thumb Code 0 startup_lpc17xx.o(.text) + USB_IRQHandler 0x00000183 Thumb Code 0 startup_lpc17xx.o(.text) + WDT_IRQHandler 0x00000183 Thumb Code 0 startup_lpc17xx.o(.text) + __user_initial_stackheap 0x00000185 Thumb Code 0 startup_lpc17xx.o(.text) + __use_two_region_memory 0x000001a5 Thumb Code 2 heapauxi.o(.text) + __rt_heap_escrow$2region 0x000001a7 Thumb Code 2 heapauxi.o(.text) + __rt_heap_expand$2region 0x000001a9 Thumb Code 2 heapauxi.o(.text) + __user_setup_stackheap 0x000001ab Thumb Code 74 sys_stackheap_outer.o(.text) + exit 0x000001f5 Thumb Code 18 exit.o(.text) + __user_libspace 0x00000209 Thumb Code 8 libspace.o(.text) + __user_perproc_libspace 0x00000209 Thumb Code 0 libspace.o(.text) + __user_perthread_libspace 0x00000209 Thumb Code 0 libspace.o(.text) + _sys_exit 0x00000211 Thumb Code 8 sys_exit.o(.text) + __I$use$semihosting 0x0000021d Thumb Code 0 use_no_semi.o(.text) + __use_no_semihosting_swi 0x0000021d Thumb Code 2 use_no_semi.o(.text) + __semihosting_library_function 0x0000021f Thumb Code 0 indicate_semi.o(.text) + GLCD_Clear 0x00000221 Thumb Code 44 glcd_spi_lpc1700.o(i.GLCD_Clear) + GLCD_DisplayChar 0x00000251 Thumb Code 66 glcd_spi_lpc1700.o(i.GLCD_DisplayChar) + GLCD_DisplayString 0x0000029d Thumb Code 38 glcd_spi_lpc1700.o(i.GLCD_DisplayString) + GLCD_SetBackColor 0x000002c5 Thumb Code 6 glcd_spi_lpc1700.o(i.GLCD_SetBackColor) + GLCD_SetTextColor 0x000002d1 Thumb Code 6 glcd_spi_lpc1700.o(i.GLCD_SetTextColor) + GLCD_WindowMax 0x000002dd Thumb Code 14 glcd_spi_lpc1700.o(i.GLCD_WindowMax) + GLCD_DrawChar 0x00000301 Thumb Code 136 glcd_spi_lpc1700.o(i.GLCD_DrawChar) + GLCD_Init 0x00000391 Thumb Code 1476 glcd_spi_lpc1700.o(i.GLCD_Init) + GLCD_SetWindow 0x00000955 Thumb Code 148 glcd_spi_lpc1700.o(i.GLCD_SetWindow) + SysTick_Handler 0x000009ed Thumb Code 116 bitband.o(i.SysTick_Handler) + SystemInit 0x00000a95 Thumb Code 192 system_lpc17xx.o(i.SystemInit) + main 0x00000b61 Thumb Code 138 bitband.o(i.main) + Font_6x8_h 0x00000dc6 Data 896 glcd_spi_lpc1700.o(.constdata) + Font_16x24_h 0x00001146 Data 5376 glcd_spi_lpc1700.o(.constdata) + EventRecorderInfo 0x00002648 Data 24 eventrecorder.o(.constdata) + Region$$Table$$Base 0x00002660 Number 0 anon$$obj.o(Region$$Table) + Region$$Table$$Limit 0x00002680 Number 0 anon$$obj.o(Region$$Table) + __libspace_start 0x10000014 Data 96 libspace.o(.bss) + __temporary_stack_top$libspace 0x10000074 Data 0 libspace.o(.bss) + + + +============================================================================== + +Memory Map of the image + + Image Entry point : 0x000000cd + + Load Region LR_IROM1 (Base: 0x00000000, Size: 0x00002694, Max: 0x00080000, ABSOLUTE) + + Execution Region ER_IROM1 (Exec base: 0x00000000, Load base: 0x00000000, Size: 0x00002680, Max: 0x00080000, ABSOLUTE) + + Exec Addr Load Addr Size Type Attr Idx E Section Name Object + + 0x00000000 0x00000000 0x000000cc Data RO 548 RESET startup_lpc17xx.o + 0x000000cc 0x000000cc 0x00000008 Code RO 602 * !!!main c_w.l(__main.o) + 0x000000d4 0x000000d4 0x00000034 Code RO 771 !!!scatter c_w.l(__scatter.o) + 0x00000108 0x00000108 0x0000001a Code RO 773 !!handler_copy c_w.l(__scatter_copy.o) + 0x00000122 0x00000122 0x00000002 PAD + 0x00000124 0x00000124 0x0000001c Code RO 775 !!handler_zi c_w.l(__scatter_zi.o) + 0x00000140 0x00000140 0x00000002 Code RO 641 .ARM.Collect$$libinit$$00000000 c_w.l(libinit.o) + 0x00000142 0x00000142 0x00000000 Code RO 654 .ARM.Collect$$libinit$$00000002 c_w.l(libinit2.o) + 0x00000142 0x00000142 0x00000000 Code RO 656 .ARM.Collect$$libinit$$00000004 c_w.l(libinit2.o) + 0x00000142 0x00000142 0x00000000 Code RO 659 .ARM.Collect$$libinit$$0000000A c_w.l(libinit2.o) + 0x00000142 0x00000142 0x00000000 Code RO 661 .ARM.Collect$$libinit$$0000000C c_w.l(libinit2.o) + 0x00000142 0x00000142 0x00000000 Code RO 663 .ARM.Collect$$libinit$$0000000E c_w.l(libinit2.o) + 0x00000142 0x00000142 0x00000000 Code RO 666 .ARM.Collect$$libinit$$00000011 c_w.l(libinit2.o) + 0x00000142 0x00000142 0x00000000 Code RO 668 .ARM.Collect$$libinit$$00000013 c_w.l(libinit2.o) + 0x00000142 0x00000142 0x00000000 Code RO 670 .ARM.Collect$$libinit$$00000015 c_w.l(libinit2.o) + 0x00000142 0x00000142 0x00000000 Code RO 672 .ARM.Collect$$libinit$$00000017 c_w.l(libinit2.o) + 0x00000142 0x00000142 0x00000000 Code RO 674 .ARM.Collect$$libinit$$00000019 c_w.l(libinit2.o) + 0x00000142 0x00000142 0x00000000 Code RO 676 .ARM.Collect$$libinit$$0000001B c_w.l(libinit2.o) + 0x00000142 0x00000142 0x00000000 Code RO 678 .ARM.Collect$$libinit$$0000001D c_w.l(libinit2.o) + 0x00000142 0x00000142 0x00000000 Code RO 680 .ARM.Collect$$libinit$$0000001F c_w.l(libinit2.o) + 0x00000142 0x00000142 0x00000000 Code RO 682 .ARM.Collect$$libinit$$00000021 c_w.l(libinit2.o) + 0x00000142 0x00000142 0x00000000 Code RO 684 .ARM.Collect$$libinit$$00000023 c_w.l(libinit2.o) + 0x00000142 0x00000142 0x00000000 Code RO 686 .ARM.Collect$$libinit$$00000025 c_w.l(libinit2.o) + 0x00000142 0x00000142 0x00000000 Code RO 690 .ARM.Collect$$libinit$$0000002C c_w.l(libinit2.o) + 0x00000142 0x00000142 0x00000000 Code RO 692 .ARM.Collect$$libinit$$0000002E c_w.l(libinit2.o) + 0x00000142 0x00000142 0x00000000 Code RO 694 .ARM.Collect$$libinit$$00000030 c_w.l(libinit2.o) + 0x00000142 0x00000142 0x00000000 Code RO 696 .ARM.Collect$$libinit$$00000032 c_w.l(libinit2.o) + 0x00000142 0x00000142 0x00000002 Code RO 697 .ARM.Collect$$libinit$$00000033 c_w.l(libinit2.o) + 0x00000144 0x00000144 0x00000002 Code RO 728 .ARM.Collect$$libshutdown$$00000000 c_w.l(libshutdown.o) + 0x00000146 0x00000146 0x00000000 Code RO 754 .ARM.Collect$$libshutdown$$00000002 c_w.l(libshutdown2.o) + 0x00000146 0x00000146 0x00000000 Code RO 756 .ARM.Collect$$libshutdown$$00000004 c_w.l(libshutdown2.o) + 0x00000146 0x00000146 0x00000000 Code RO 759 .ARM.Collect$$libshutdown$$00000007 c_w.l(libshutdown2.o) + 0x00000146 0x00000146 0x00000000 Code RO 762 .ARM.Collect$$libshutdown$$0000000A c_w.l(libshutdown2.o) + 0x00000146 0x00000146 0x00000000 Code RO 764 .ARM.Collect$$libshutdown$$0000000C c_w.l(libshutdown2.o) + 0x00000146 0x00000146 0x00000000 Code RO 767 .ARM.Collect$$libshutdown$$0000000F c_w.l(libshutdown2.o) + 0x00000146 0x00000146 0x00000002 Code RO 768 .ARM.Collect$$libshutdown$$00000010 c_w.l(libshutdown2.o) + 0x00000148 0x00000148 0x00000000 Code RO 604 .ARM.Collect$$rtentry$$00000000 c_w.l(__rtentry.o) + 0x00000148 0x00000148 0x00000000 Code RO 612 .ARM.Collect$$rtentry$$00000002 c_w.l(__rtentry2.o) + 0x00000148 0x00000148 0x00000006 Code RO 624 .ARM.Collect$$rtentry$$00000004 c_w.l(__rtentry4.o) + 0x0000014e 0x0000014e 0x00000000 Code RO 614 .ARM.Collect$$rtentry$$00000009 c_w.l(__rtentry2.o) + 0x0000014e 0x0000014e 0x00000004 Code RO 615 .ARM.Collect$$rtentry$$0000000A c_w.l(__rtentry2.o) + 0x00000152 0x00000152 0x00000000 Code RO 617 .ARM.Collect$$rtentry$$0000000C c_w.l(__rtentry2.o) + 0x00000152 0x00000152 0x00000008 Code RO 618 .ARM.Collect$$rtentry$$0000000D c_w.l(__rtentry2.o) + 0x0000015a 0x0000015a 0x00000002 Code RO 645 .ARM.Collect$$rtexit$$00000000 c_w.l(rtexit.o) + 0x0000015c 0x0000015c 0x00000000 Code RO 701 .ARM.Collect$$rtexit$$00000002 c_w.l(rtexit2.o) + 0x0000015c 0x0000015c 0x00000004 Code RO 702 .ARM.Collect$$rtexit$$00000003 c_w.l(rtexit2.o) + 0x00000160 0x00000160 0x00000006 Code RO 703 .ARM.Collect$$rtexit$$00000004 c_w.l(rtexit2.o) + 0x00000166 0x00000166 0x00000002 PAD + 0x00000168 0x00000168 0x0000003c Code RO 550 .text startup_lpc17xx.o + 0x000001a4 0x000001a4 0x00000006 Code RO 600 .text c_w.l(heapauxi.o) + 0x000001aa 0x000001aa 0x0000004a Code RO 628 .text c_w.l(sys_stackheap_outer.o) + 0x000001f4 0x000001f4 0x00000012 Code RO 630 .text c_w.l(exit.o) + 0x00000206 0x00000206 0x00000002 PAD + 0x00000208 0x00000208 0x00000008 Code RO 642 .text c_w.l(libspace.o) + 0x00000210 0x00000210 0x0000000c Code RO 698 .text c_w.l(sys_exit.o) + 0x0000021c 0x0000021c 0x00000002 Code RO 717 .text c_w.l(use_no_semi.o) + 0x0000021e 0x0000021e 0x00000000 Code RO 719 .text c_w.l(indicate_semi.o) + 0x0000021e 0x0000021e 0x00000002 PAD + 0x00000220 0x00000220 0x00000030 Code RO 88 i.GLCD_Clear glcd_spi_lpc1700.o + 0x00000250 0x00000250 0x0000004c Code RO 90 i.GLCD_DisplayChar glcd_spi_lpc1700.o + 0x0000029c 0x0000029c 0x00000026 Code RO 91 i.GLCD_DisplayString glcd_spi_lpc1700.o + 0x000002c2 0x000002c2 0x00000002 PAD + 0x000002c4 0x000002c4 0x0000000c Code RO 96 i.GLCD_SetBackColor glcd_spi_lpc1700.o + 0x000002d0 0x000002d0 0x0000000c Code RO 97 i.GLCD_SetTextColor glcd_spi_lpc1700.o + 0x000002dc 0x000002dc 0x0000000e Code RO 99 i.GLCD_WindowMax glcd_spi_lpc1700.o + 0x000002ea 0x000002ea 0x00000008 Code RO 102 i.delay glcd_spi_lpc1700.o + 0x000002f2 0x000002f2 0x0000000a PAD + 0x000002fc 0x000002fc 0x00000004 Code RO 549 .ARM.__at_0x02FC startup_lpc17xx.o + 0x00000300 0x00000300 0x00000090 Code RO 92 i.GLCD_DrawChar glcd_spi_lpc1700.o + 0x00000390 0x00000390 0x000005c4 Code RO 93 i.GLCD_Init glcd_spi_lpc1700.o + 0x00000954 0x00000954 0x00000098 Code RO 98 i.GLCD_SetWindow glcd_spi_lpc1700.o + 0x000009ec 0x000009ec 0x000000a8 Code RO 4 i.SysTick_Handler bitband.o + 0x00000a94 0x00000a94 0x000000cc Code RO 560 i.SystemInit system_lpc17xx.o + 0x00000b60 0x00000b60 0x000000e8 Code RO 6 i.main bitband.o + 0x00000c48 0x00000c48 0x0000000c Code RO 7 i.method2lcd bitband.o + 0x00000c54 0x00000c54 0x00000070 Code RO 103 i.rd_id_man glcd_spi_lpc1700.o + 0x00000cc4 0x00000cc4 0x00000014 Code RO 104 i.spi_tran glcd_spi_lpc1700.o + 0x00000cd8 0x00000cd8 0x00000070 Code RO 105 i.spi_tran_man glcd_spi_lpc1700.o + 0x00000d48 0x00000d48 0x00000024 Code RO 106 i.wr_cmd glcd_spi_lpc1700.o + 0x00000d6c 0x00000d6c 0x00000024 Code RO 107 i.wr_dat glcd_spi_lpc1700.o + 0x00000d90 0x00000d90 0x00000014 Code RO 108 i.wr_dat_only glcd_spi_lpc1700.o + 0x00000da4 0x00000da4 0x00000010 Code RO 109 i.wr_dat_start glcd_spi_lpc1700.o + 0x00000db4 0x00000db4 0x00000012 Code RO 110 i.wr_reg glcd_spi_lpc1700.o + 0x00000dc6 0x00000dc6 0x00001880 Data RO 111 .constdata glcd_spi_lpc1700.o + 0x00002646 0x00002646 0x00000002 PAD + 0x00002648 0x00002648 0x00000018 Data RO 348 .constdata eventrecorder.o + 0x00002660 0x00002660 0x00000020 Data RO 769 Region$$Table anon$$obj.o + + + Execution Region RW_IRAM1 (Exec base: 0x10000000, Load base: 0x00002680, Size: 0x00000728, Max: 0x00008000, ABSOLUTE) + + Exec Addr Load Addr Size Type Attr Idx E Section Name Object + + 0x10000000 0x00002680 0x0000000c Data RW 8 .data bitband.o + 0x1000000c 0x0000268c 0x00000006 Data RW 112 .data glcd_spi_lpc1700.o + 0x10000012 0x00002692 0x00000002 PAD + 0x10000014 - 0x00000060 Zero RW 643 .bss c_w.l(libspace.o) + 0x10000074 0x00002692 0x0000000c PAD + 0x10000080 - 0x000004a4 Zero RW 347 .bss.noinit eventrecorder.o + 0x10000524 0x00002692 0x00000004 PAD + 0x10000528 - 0x00000000 Zero RW 547 HEAP startup_lpc17xx.o + 0x10000528 - 0x00000200 Zero RW 546 STACK startup_lpc17xx.o + + +============================================================================== + +Image component sizes + + + Code (inc. data) RO Data RW Data ZI Data Debug Object Name + + 412 146 0 12 0 8520 bitband.o + 0 0 24 0 1188 4369 eventrecorder.o + 2350 90 6272 6 0 14207 glcd_spi_lpc1700.o + 64 26 204 0 512 980 startup_lpc17xx.o + 204 12 0 0 0 593 system_lpc17xx.o + + ---------------------------------------------------------------------- + 3042 274 6534 20 1704 28669 Object Totals + 0 0 32 0 0 0 (incl. Generated) + 12 0 2 2 4 0 (incl. Padding) + + ---------------------------------------------------------------------- + + Code (inc. data) RO Data RW Data ZI Data Debug Library Member Name + + 8 0 0 0 0 68 __main.o + 0 0 0 0 0 0 __rtentry.o + 12 0 0 0 0 0 __rtentry2.o + 6 0 0 0 0 0 __rtentry4.o + 52 8 0 0 0 0 __scatter.o + 26 0 0 0 0 0 __scatter_copy.o + 28 0 0 0 0 0 __scatter_zi.o + 18 0 0 0 0 80 exit.o + 6 0 0 0 0 152 heapauxi.o + 0 0 0 0 0 0 indicate_semi.o + 2 0 0 0 0 0 libinit.o + 2 0 0 0 0 0 libinit2.o + 2 0 0 0 0 0 libshutdown.o + 2 0 0 0 0 0 libshutdown2.o + 8 4 0 0 96 68 libspace.o + 2 0 0 0 0 0 rtexit.o + 10 0 0 0 0 0 rtexit2.o + 12 4 0 0 0 68 sys_exit.o + 74 0 0 0 0 80 sys_stackheap_outer.o + 2 0 0 0 0 68 use_no_semi.o + + ---------------------------------------------------------------------- + 280 16 0 0 108 584 Library Totals + 8 0 0 0 12 0 (incl. Padding) + + ---------------------------------------------------------------------- + + Code (inc. data) RO Data RW Data ZI Data Debug Library Name + + 272 16 0 0 96 584 c_w.l + + ---------------------------------------------------------------------- + 280 16 0 0 108 584 Library Totals + + ---------------------------------------------------------------------- + +============================================================================== + + + Code (inc. data) RO Data RW Data ZI Data Debug + + 3322 290 6534 20 1812 28105 Grand Totals + 3322 290 6534 20 1812 28105 ELF Image Totals + 3322 290 6534 20 0 0 ROM Totals + +============================================================================== + + Total RO Size (Code + RO Data) 9856 ( 9.63kB) + Total RW Size (RW Data + ZI Data) 1832 ( 1.79kB) + Total ROM Size (Code + RO Data + RW Data) 9876 ( 9.64kB) + +============================================================================== + diff --git a/F2024/coe718/labs/lab2/Listings/startup_lpc17xx.lst b/F2024/coe718/labs/lab2/Listings/startup_lpc17xx.lst new file mode 100755 index 0000000..21c1d94 --- /dev/null +++ b/F2024/coe718/labs/lab2/Listings/startup_lpc17xx.lst @@ -0,0 +1,1095 @@ + + + +ARM Macro Assembler Page 1 + + + 1 00000000 ;/****************************************************** + ********************//** + 2 00000000 ; * @file startup_LPC17xx.s + 3 00000000 ; * @brief CMSIS Cortex-M3 Core Device Startup File f + or + 4 00000000 ; * NXP LPC17xx Device Series + 5 00000000 ; * @version V1.10 + 6 00000000 ; * @date 06. April 2011 + 7 00000000 ; * + 8 00000000 ; * @note + 9 00000000 ; * Copyright (C) 2009-2011 ARM Limited. All rights rese + rved. + 10 00000000 ; * + 11 00000000 ; * @par + 12 00000000 ; * ARM Limited (ARM) is supplying this software for use + with Cortex-M + 13 00000000 ; * processor based microcontrollers. This file can be + freely distributed + 14 00000000 ; * within development tools that are supporting such AR + M based processors. + 15 00000000 ; * + 16 00000000 ; * @par + 17 00000000 ; * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, W + HETHER EXPRESS, IMPLIED + 18 00000000 ; * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED + WARRANTIES OF + 19 00000000 ; * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + APPLY TO THIS SOFTWARE. + 20 00000000 ; * ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR S + PECIAL, INCIDENTAL, OR + 21 00000000 ; * CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER. + 22 00000000 ; * + 23 00000000 ; ****************************************************** + ************************/ + 24 00000000 + 25 00000000 ; *------- <<< Use Configuration Wizard in Context Menu + >>> ------------------ + 26 00000000 + 27 00000000 ; Stack Configuration + 28 00000000 ; Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> + 29 00000000 ; + 30 00000000 + 31 00000000 00000200 + Stack_Size + EQU 0x00000200 + 32 00000000 + 33 00000000 AREA STACK, NOINIT, READWRITE, ALIGN +=3 + 34 00000000 Stack_Mem + SPACE Stack_Size + 35 00000200 __initial_sp + 36 00000200 + 37 00000200 + 38 00000200 ; Heap Configuration + 39 00000200 ; Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> + 40 00000200 ; + 41 00000200 + 42 00000200 00000000 + Heap_Size + + + +ARM Macro Assembler Page 2 + + + EQU 0x00000000 + 43 00000200 + 44 00000200 AREA HEAP, NOINIT, READWRITE, ALIGN= +3 + 45 00000000 __heap_base + 46 00000000 Heap_Mem + SPACE Heap_Size + 47 00000000 __heap_limit + 48 00000000 + 49 00000000 + 50 00000000 PRESERVE8 + 51 00000000 THUMB + 52 00000000 + 53 00000000 + 54 00000000 ; Vector Table Mapped to Address 0 at Reset + 55 00000000 + 56 00000000 AREA RESET, DATA, READONLY + 57 00000000 EXPORT __Vectors + 58 00000000 + 59 00000000 00000000 + __Vectors + DCD __initial_sp ; Top of Stack + 60 00000004 00000000 DCD Reset_Handler ; Reset Handler + 61 00000008 00000000 DCD NMI_Handler ; NMI Handler + 62 0000000C 00000000 DCD HardFault_Handler ; Hard Fault + Handler + 63 00000010 00000000 DCD MemManage_Handler + ; MPU Fault Handler + + 64 00000014 00000000 DCD BusFault_Handler + ; Bus Fault Handler + + 65 00000018 00000000 DCD UsageFault_Handler ; Usage Faul + t Handler + 66 0000001C 00000000 DCD 0 ; Reserved + 67 00000020 00000000 DCD 0 ; Reserved + 68 00000024 00000000 DCD 0 ; Reserved + 69 00000028 00000000 DCD 0 ; Reserved + 70 0000002C 00000000 DCD SVC_Handler ; SVCall Handler + 71 00000030 00000000 DCD DebugMon_Handler ; Debug Monito + r Handler + 72 00000034 00000000 DCD 0 ; Reserved + 73 00000038 00000000 DCD PendSV_Handler ; PendSV Handler + + 74 0000003C 00000000 DCD SysTick_Handler + ; SysTick Handler + 75 00000040 + 76 00000040 ; External Interrupts + 77 00000040 00000000 DCD WDT_IRQHandler ; 16: Watchdog T + imer + 78 00000044 00000000 DCD TIMER0_IRQHandler ; 17: Timer0 + 79 00000048 00000000 DCD TIMER1_IRQHandler ; 18: Timer1 + 80 0000004C 00000000 DCD TIMER2_IRQHandler ; 19: Timer2 + 81 00000050 00000000 DCD TIMER3_IRQHandler ; 20: Timer3 + 82 00000054 00000000 DCD UART0_IRQHandler ; 21: UART0 + 83 00000058 00000000 DCD UART1_IRQHandler ; 22: UART1 + 84 0000005C 00000000 DCD UART2_IRQHandler ; 23: UART2 + 85 00000060 00000000 DCD UART3_IRQHandler ; 24: UART3 + 86 00000064 00000000 DCD PWM1_IRQHandler ; 25: PWM1 + + + +ARM Macro Assembler Page 3 + + + 87 00000068 00000000 DCD I2C0_IRQHandler ; 26: I2C0 + 88 0000006C 00000000 DCD I2C1_IRQHandler ; 27: I2C1 + 89 00000070 00000000 DCD I2C2_IRQHandler ; 28: I2C2 + 90 00000074 00000000 DCD SPI_IRQHandler ; 29: SPI + 91 00000078 00000000 DCD SSP0_IRQHandler ; 30: SSP0 + 92 0000007C 00000000 DCD SSP1_IRQHandler ; 31: SSP1 + 93 00000080 00000000 DCD PLL0_IRQHandler ; 32: PLL0 Lock + (Main PLL) + 94 00000084 00000000 DCD RTC_IRQHandler ; 33: Real Time + Clock + 95 00000088 00000000 DCD EINT0_IRQHandler ; 34: External + Interrupt 0 + 96 0000008C 00000000 DCD EINT1_IRQHandler ; 35: External + Interrupt 1 + 97 00000090 00000000 DCD EINT2_IRQHandler ; 36: External + Interrupt 2 + 98 00000094 00000000 DCD EINT3_IRQHandler ; 37: External + Interrupt 3 + 99 00000098 00000000 DCD ADC_IRQHandler + ; 38: A/D Converter + + 100 0000009C 00000000 DCD BOD_IRQHandler ; 39: Brown-Out + Detect + 101 000000A0 00000000 DCD USB_IRQHandler ; 40: USB + 102 000000A4 00000000 DCD CAN_IRQHandler ; 41: CAN + 103 000000A8 00000000 DCD DMA_IRQHandler ; 42: General Pu + rpose DMA + 104 000000AC 00000000 DCD I2S_IRQHandler ; 43: I2S + 105 000000B0 00000000 DCD ENET_IRQHandler ; 44: Ethernet + 106 000000B4 00000000 DCD RIT_IRQHandler ; 45: Repetitive + Interrupt Timer + 107 000000B8 00000000 DCD MCPWM_IRQHandler ; 46: Motor Co + ntrol PWM + 108 000000BC 00000000 DCD QEI_IRQHandler ; 47: Quadrature + Encoder Interface + 109 000000C0 00000000 DCD PLL1_IRQHandler ; 48: PLL1 Lock + (USB PLL) + 110 000000C4 00000000 DCD USBActivity_IRQHandler ; 49: US + B Activity interrup + t to wakeup + 111 000000C8 00000000 DCD CANActivity_IRQHandler ; 50: CA + N Activity interrup + t to wakeup + 112 000000CC + 113 000000CC + 114 000000CC IF :LNOT::DEF:NO_CRP + 115 000000CC AREA |.ARM.__at_0x02FC|, CODE, READO +NLY + 116 00000000 FFFFFFFF + CRP_Key DCD 0xFFFFFFFF + 117 00000004 ENDIF + 118 00000004 + 119 00000004 + 120 00000004 AREA |.text|, CODE, READONLY + 121 00000000 + 122 00000000 + 123 00000000 ; Reset Handler + 124 00000000 + 125 00000000 Reset_Handler + + + +ARM Macro Assembler Page 4 + + + PROC + 126 00000000 EXPORT Reset_Handler [WEAK +] + 127 00000000 IMPORT SystemInit + 128 00000000 IMPORT __main + 129 00000000 4809 LDR R0, =SystemInit + 130 00000002 4780 BLX R0 + 131 00000004 4809 LDR R0, =__main + 132 00000006 4700 BX R0 + 133 00000008 ENDP + 134 00000008 + 135 00000008 + 136 00000008 ; Dummy Exception Handlers (infinite loops which can be + modified) + 137 00000008 + 138 00000008 NMI_Handler + PROC + 139 00000008 EXPORT NMI_Handler [WEAK +] + 140 00000008 E7FE B . + 141 0000000A ENDP + 143 0000000A HardFault_Handler + PROC + 144 0000000A EXPORT HardFault_Handler [WEAK +] + 145 0000000A E7FE B . + 146 0000000C ENDP + 148 0000000C MemManage_Handler + PROC + 149 0000000C EXPORT MemManage_Handler [WEAK +] + 150 0000000C E7FE B . + 151 0000000E ENDP + 153 0000000E BusFault_Handler + PROC + 154 0000000E EXPORT BusFault_Handler [WEAK +] + 155 0000000E E7FE B . + 156 00000010 ENDP + 158 00000010 UsageFault_Handler + PROC + 159 00000010 EXPORT UsageFault_Handler [WEAK +] + 160 00000010 E7FE B . + 161 00000012 ENDP + 162 00000012 SVC_Handler + PROC + 163 00000012 EXPORT SVC_Handler [WEAK +] + 164 00000012 E7FE B . + 165 00000014 ENDP + 167 00000014 DebugMon_Handler + PROC + 168 00000014 EXPORT DebugMon_Handler [WEAK +] + 169 00000014 E7FE B . + 170 00000016 ENDP + 171 00000016 PendSV_Handler + PROC + + + +ARM Macro Assembler Page 5 + + + 172 00000016 EXPORT PendSV_Handler [WEAK +] + 173 00000016 E7FE B . + 174 00000018 ENDP + 175 00000018 SysTick_Handler + PROC + 176 00000018 EXPORT SysTick_Handler [WEAK +] + 177 00000018 E7FE B . + 178 0000001A ENDP + 179 0000001A + 180 0000001A Default_Handler + PROC + 181 0000001A + 182 0000001A EXPORT WDT_IRQHandler [WEAK +] + 183 0000001A EXPORT TIMER0_IRQHandler [WEAK +] + 184 0000001A EXPORT TIMER1_IRQHandler [WEAK +] + 185 0000001A EXPORT TIMER2_IRQHandler [WEAK +] + 186 0000001A EXPORT TIMER3_IRQHandler [WEAK +] + 187 0000001A EXPORT UART0_IRQHandler [WEAK +] + 188 0000001A EXPORT UART1_IRQHandler [WEAK +] + 189 0000001A EXPORT UART2_IRQHandler [WEAK +] + 190 0000001A EXPORT UART3_IRQHandler [WEAK +] + 191 0000001A EXPORT PWM1_IRQHandler [WEAK +] + 192 0000001A EXPORT I2C0_IRQHandler [WEAK +] + 193 0000001A EXPORT I2C1_IRQHandler [WEAK +] + 194 0000001A EXPORT I2C2_IRQHandler [WEAK +] + 195 0000001A EXPORT SPI_IRQHandler [WEAK +] + 196 0000001A EXPORT SSP0_IRQHandler [WEAK +] + 197 0000001A EXPORT SSP1_IRQHandler [WEAK +] + 198 0000001A EXPORT PLL0_IRQHandler [WEAK +] + 199 0000001A EXPORT RTC_IRQHandler [WEAK +] + 200 0000001A EXPORT EINT0_IRQHandler [WEAK +] + 201 0000001A EXPORT EINT1_IRQHandler [WEAK +] + 202 0000001A EXPORT EINT2_IRQHandler [WEAK +] + 203 0000001A EXPORT EINT3_IRQHandler [WEAK +] + 204 0000001A EXPORT ADC_IRQHandler [WEAK + + + +ARM Macro Assembler Page 6 + + +] + 205 0000001A EXPORT BOD_IRQHandler [WEAK +] + 206 0000001A EXPORT USB_IRQHandler [WEAK +] + 207 0000001A EXPORT CAN_IRQHandler [WEAK +] + 208 0000001A EXPORT DMA_IRQHandler [WEAK +] + 209 0000001A EXPORT I2S_IRQHandler [WEAK +] + 210 0000001A EXPORT ENET_IRQHandler [WEAK +] + 211 0000001A EXPORT RIT_IRQHandler [WEAK +] + 212 0000001A EXPORT MCPWM_IRQHandler [WEAK +] + 213 0000001A EXPORT QEI_IRQHandler [WEAK +] + 214 0000001A EXPORT PLL1_IRQHandler [WEAK +] + 215 0000001A EXPORT USBActivity_IRQHandler [WEAK +] + 216 0000001A EXPORT CANActivity_IRQHandler [WEAK +] + 217 0000001A + 218 0000001A WDT_IRQHandler + 219 0000001A TIMER0_IRQHandler + 220 0000001A TIMER1_IRQHandler + 221 0000001A TIMER2_IRQHandler + 222 0000001A TIMER3_IRQHandler + 223 0000001A UART0_IRQHandler + 224 0000001A UART1_IRQHandler + 225 0000001A UART2_IRQHandler + 226 0000001A UART3_IRQHandler + 227 0000001A PWM1_IRQHandler + 228 0000001A I2C0_IRQHandler + 229 0000001A I2C1_IRQHandler + 230 0000001A I2C2_IRQHandler + 231 0000001A SPI_IRQHandler + 232 0000001A SSP0_IRQHandler + 233 0000001A SSP1_IRQHandler + 234 0000001A PLL0_IRQHandler + 235 0000001A RTC_IRQHandler + 236 0000001A EINT0_IRQHandler + 237 0000001A EINT1_IRQHandler + 238 0000001A EINT2_IRQHandler + 239 0000001A EINT3_IRQHandler + 240 0000001A ADC_IRQHandler + 241 0000001A BOD_IRQHandler + 242 0000001A USB_IRQHandler + 243 0000001A CAN_IRQHandler + 244 0000001A DMA_IRQHandler + 245 0000001A I2S_IRQHandler + 246 0000001A ENET_IRQHandler + 247 0000001A RIT_IRQHandler + 248 0000001A MCPWM_IRQHandler + 249 0000001A QEI_IRQHandler + 250 0000001A PLL1_IRQHandler + + + +ARM Macro Assembler Page 7 + + + 251 0000001A USBActivity_IRQHandler + 252 0000001A CANActivity_IRQHandler + 253 0000001A + 254 0000001A E7FE B . + 255 0000001C + 256 0000001C ENDP + 257 0000001C + 258 0000001C + 259 0000001C ALIGN + 260 0000001C + 261 0000001C + 262 0000001C ; User Initial Stack & Heap + 263 0000001C + 264 0000001C IF :DEF:__MICROLIB + 271 0000001C + 272 0000001C IMPORT __use_two_region_memory + 273 0000001C EXPORT __user_initial_stackheap + 274 0000001C __user_initial_stackheap + 275 0000001C + 276 0000001C 4804 LDR R0, = Heap_Mem + 277 0000001E 4905 LDR R1, =(Stack_Mem + Stack_Size) + 278 00000020 4A03 LDR R2, = (Heap_Mem + Heap_Size) + 279 00000022 4B05 LDR R3, = Stack_Mem + 280 00000024 4770 BX LR + 281 00000026 + 282 00000026 00 00 ALIGN + 283 00000028 + 284 00000028 ENDIF + 285 00000028 + 286 00000028 + 287 00000028 END + 00000000 + 00000000 + 00000000 + 00000200 + 00000000 +Command Line: --debug --xref --diag_suppress=9931 --cpu=Cortex-M3 --apcs=interw +ork --depend=.\objects\startup_lpc17xx.d -o.\objects\startup_lpc17xx.o -I.\RTE\ +Compiler -I.\RTE\Device\LPC1768 -I.\RTE\_Target_1 -IC:\Users\ECBME\AppData\Loca +l\Arm\Packs\ARM\CMSIS\5.7.0\CMSIS\Core\Include -IC:\Users\ECBME\AppData\Local\A +rm\Packs\Keil\ARM_Compiler\1.6.3\Include -IC:\Users\ECBME\AppData\Local\Arm\Pac +ks\Keil\LPC1700_DFP\2.6.0\Device\Include -IC:\Users\ECBME\AppData\Local\Arm\Pac +ks\Keil\LPC1700_DFP\2.6.0\RTE_Driver -IC:\Users\ECBME\AppData\Local\Arm\Packs\K +eil\MDK-Middleware\7.12.0\Board --predefine="__UVISION_VERSION SETA 531" --pred +efine="_RTE_ SETA 1" --predefine="LPC175x_6x SETA 1" --predefine="_RTE_ SETA 1" + --list=.\listings\startup_lpc17xx.lst RTE\Device\LPC1768\startup_LPC17xx.s + + + +ARM Macro Assembler Page 1 Alphabetic symbol ordering +Relocatable symbols + +STACK 00000000 + +Symbol: STACK + Definitions + At line 33 in file RTE\Device\LPC1768\startup_LPC17xx.s + Uses + None +Comment: STACK unused +Stack_Mem 00000000 + +Symbol: Stack_Mem + Definitions + At line 34 in file RTE\Device\LPC1768\startup_LPC17xx.s + Uses + At line 277 in file RTE\Device\LPC1768\startup_LPC17xx.s + At line 279 in file RTE\Device\LPC1768\startup_LPC17xx.s + +__initial_sp 00000200 + +Symbol: __initial_sp + Definitions + At line 35 in file RTE\Device\LPC1768\startup_LPC17xx.s + Uses + At line 59 in file RTE\Device\LPC1768\startup_LPC17xx.s +Comment: __initial_sp used once +3 symbols + + + +ARM Macro Assembler Page 1 Alphabetic symbol ordering +Relocatable symbols + +HEAP 00000000 + +Symbol: HEAP + Definitions + At line 44 in file RTE\Device\LPC1768\startup_LPC17xx.s + Uses + None +Comment: HEAP unused +Heap_Mem 00000000 + +Symbol: Heap_Mem + Definitions + At line 46 in file RTE\Device\LPC1768\startup_LPC17xx.s + Uses + At line 276 in file RTE\Device\LPC1768\startup_LPC17xx.s + At line 278 in file RTE\Device\LPC1768\startup_LPC17xx.s + +__heap_base 00000000 + +Symbol: __heap_base + Definitions + At line 45 in file RTE\Device\LPC1768\startup_LPC17xx.s + Uses + None +Comment: __heap_base unused +__heap_limit 00000000 + +Symbol: __heap_limit + Definitions + At line 47 in file RTE\Device\LPC1768\startup_LPC17xx.s + Uses + None +Comment: __heap_limit unused +4 symbols + + + +ARM Macro Assembler Page 1 Alphabetic symbol ordering +Relocatable symbols + +RESET 00000000 + +Symbol: RESET + Definitions + At line 56 in file RTE\Device\LPC1768\startup_LPC17xx.s + Uses + None +Comment: RESET unused +__Vectors 00000000 + +Symbol: __Vectors + Definitions + At line 59 in file RTE\Device\LPC1768\startup_LPC17xx.s + Uses + At line 57 in file RTE\Device\LPC1768\startup_LPC17xx.s +Comment: __Vectors used once +2 symbols + + + +ARM Macro Assembler Page 1 Alphabetic symbol ordering +Relocatable symbols + +.ARM.__at_0x02FC 00000000 + +Symbol: .ARM.__at_0x02FC + Definitions + At line 115 in file RTE\Device\LPC1768\startup_LPC17xx.s + Uses + None +Comment: .ARM.__at_0x02FC unused +CRP_Key 00000000 + +Symbol: CRP_Key + Definitions + At line 116 in file RTE\Device\LPC1768\startup_LPC17xx.s + Uses + None +Comment: CRP_Key unused +2 symbols + + + +ARM Macro Assembler Page 1 Alphabetic symbol ordering +Relocatable symbols + +.text 00000000 + +Symbol: .text + Definitions + At line 120 in file RTE\Device\LPC1768\startup_LPC17xx.s + Uses + None +Comment: .text unused +ADC_IRQHandler 0000001A + +Symbol: ADC_IRQHandler + Definitions + At line 240 in file RTE\Device\LPC1768\startup_LPC17xx.s + Uses + At line 99 in file RTE\Device\LPC1768\startup_LPC17xx.s + At line 204 in file RTE\Device\LPC1768\startup_LPC17xx.s + +BOD_IRQHandler 0000001A + +Symbol: BOD_IRQHandler + Definitions + At line 241 in file RTE\Device\LPC1768\startup_LPC17xx.s + Uses + At line 100 in file RTE\Device\LPC1768\startup_LPC17xx.s + At line 205 in file RTE\Device\LPC1768\startup_LPC17xx.s + +BusFault_Handler 0000000E + +Symbol: BusFault_Handler + Definitions + At line 153 in file RTE\Device\LPC1768\startup_LPC17xx.s + Uses + At line 64 in file RTE\Device\LPC1768\startup_LPC17xx.s + At line 154 in file RTE\Device\LPC1768\startup_LPC17xx.s + +CANActivity_IRQHandler 0000001A + +Symbol: CANActivity_IRQHandler + Definitions + At line 252 in file RTE\Device\LPC1768\startup_LPC17xx.s + Uses + At line 111 in file RTE\Device\LPC1768\startup_LPC17xx.s + At line 216 in file RTE\Device\LPC1768\startup_LPC17xx.s + +CAN_IRQHandler 0000001A + +Symbol: CAN_IRQHandler + Definitions + At line 243 in file RTE\Device\LPC1768\startup_LPC17xx.s + Uses + At line 102 in file RTE\Device\LPC1768\startup_LPC17xx.s + At line 207 in file RTE\Device\LPC1768\startup_LPC17xx.s + +DMA_IRQHandler 0000001A + +Symbol: DMA_IRQHandler + Definitions + At line 244 in file RTE\Device\LPC1768\startup_LPC17xx.s + Uses + + + +ARM Macro Assembler Page 2 Alphabetic symbol ordering +Relocatable symbols + + At line 103 in file RTE\Device\LPC1768\startup_LPC17xx.s + At line 208 in file RTE\Device\LPC1768\startup_LPC17xx.s + +DebugMon_Handler 00000014 + +Symbol: DebugMon_Handler + Definitions + At line 167 in file RTE\Device\LPC1768\startup_LPC17xx.s + Uses + At line 71 in file RTE\Device\LPC1768\startup_LPC17xx.s + At line 168 in file RTE\Device\LPC1768\startup_LPC17xx.s + +Default_Handler 0000001A + +Symbol: Default_Handler + Definitions + At line 180 in file RTE\Device\LPC1768\startup_LPC17xx.s + Uses + None +Comment: Default_Handler unused +EINT0_IRQHandler 0000001A + +Symbol: EINT0_IRQHandler + Definitions + At line 236 in file RTE\Device\LPC1768\startup_LPC17xx.s + Uses + At line 95 in file RTE\Device\LPC1768\startup_LPC17xx.s + At line 200 in file RTE\Device\LPC1768\startup_LPC17xx.s + +EINT1_IRQHandler 0000001A + +Symbol: EINT1_IRQHandler + Definitions + At line 237 in file RTE\Device\LPC1768\startup_LPC17xx.s + Uses + At line 96 in file RTE\Device\LPC1768\startup_LPC17xx.s + At line 201 in file RTE\Device\LPC1768\startup_LPC17xx.s + +EINT2_IRQHandler 0000001A + +Symbol: EINT2_IRQHandler + Definitions + At line 238 in file RTE\Device\LPC1768\startup_LPC17xx.s + Uses + At line 97 in file RTE\Device\LPC1768\startup_LPC17xx.s + At line 202 in file RTE\Device\LPC1768\startup_LPC17xx.s + +EINT3_IRQHandler 0000001A + +Symbol: EINT3_IRQHandler + Definitions + At line 239 in file RTE\Device\LPC1768\startup_LPC17xx.s + Uses + At line 98 in file RTE\Device\LPC1768\startup_LPC17xx.s + At line 203 in file RTE\Device\LPC1768\startup_LPC17xx.s + +ENET_IRQHandler 0000001A + +Symbol: ENET_IRQHandler + + + +ARM Macro Assembler Page 3 Alphabetic symbol ordering +Relocatable symbols + + Definitions + At line 246 in file RTE\Device\LPC1768\startup_LPC17xx.s + Uses + At line 105 in file RTE\Device\LPC1768\startup_LPC17xx.s + At line 210 in file RTE\Device\LPC1768\startup_LPC17xx.s + +HardFault_Handler 0000000A + +Symbol: HardFault_Handler + Definitions + At line 143 in file RTE\Device\LPC1768\startup_LPC17xx.s + Uses + At line 62 in file RTE\Device\LPC1768\startup_LPC17xx.s + At line 144 in file RTE\Device\LPC1768\startup_LPC17xx.s + +I2C0_IRQHandler 0000001A + +Symbol: I2C0_IRQHandler + Definitions + At line 228 in file RTE\Device\LPC1768\startup_LPC17xx.s + Uses + At line 87 in file RTE\Device\LPC1768\startup_LPC17xx.s + At line 192 in file RTE\Device\LPC1768\startup_LPC17xx.s + +I2C1_IRQHandler 0000001A + +Symbol: I2C1_IRQHandler + Definitions + At line 229 in file RTE\Device\LPC1768\startup_LPC17xx.s + Uses + At line 88 in file RTE\Device\LPC1768\startup_LPC17xx.s + At line 193 in file RTE\Device\LPC1768\startup_LPC17xx.s + +I2C2_IRQHandler 0000001A + +Symbol: I2C2_IRQHandler + Definitions + At line 230 in file RTE\Device\LPC1768\startup_LPC17xx.s + Uses + At line 89 in file RTE\Device\LPC1768\startup_LPC17xx.s + At line 194 in file RTE\Device\LPC1768\startup_LPC17xx.s + +I2S_IRQHandler 0000001A + +Symbol: I2S_IRQHandler + Definitions + At line 245 in file RTE\Device\LPC1768\startup_LPC17xx.s + Uses + At line 104 in file RTE\Device\LPC1768\startup_LPC17xx.s + At line 209 in file RTE\Device\LPC1768\startup_LPC17xx.s + +MCPWM_IRQHandler 0000001A + +Symbol: MCPWM_IRQHandler + Definitions + At line 248 in file RTE\Device\LPC1768\startup_LPC17xx.s + Uses + At line 107 in file RTE\Device\LPC1768\startup_LPC17xx.s + At line 212 in file RTE\Device\LPC1768\startup_LPC17xx.s + + + +ARM Macro Assembler Page 4 Alphabetic symbol ordering +Relocatable symbols + + +MemManage_Handler 0000000C + +Symbol: MemManage_Handler + Definitions + At line 148 in file RTE\Device\LPC1768\startup_LPC17xx.s + Uses + At line 63 in file RTE\Device\LPC1768\startup_LPC17xx.s + At line 149 in file RTE\Device\LPC1768\startup_LPC17xx.s + +NMI_Handler 00000008 + +Symbol: NMI_Handler + Definitions + At line 138 in file RTE\Device\LPC1768\startup_LPC17xx.s + Uses + At line 61 in file RTE\Device\LPC1768\startup_LPC17xx.s + At line 139 in file RTE\Device\LPC1768\startup_LPC17xx.s + +PLL0_IRQHandler 0000001A + +Symbol: PLL0_IRQHandler + Definitions + At line 234 in file RTE\Device\LPC1768\startup_LPC17xx.s + Uses + At line 93 in file RTE\Device\LPC1768\startup_LPC17xx.s + At line 198 in file RTE\Device\LPC1768\startup_LPC17xx.s + +PLL1_IRQHandler 0000001A + +Symbol: PLL1_IRQHandler + Definitions + At line 250 in file RTE\Device\LPC1768\startup_LPC17xx.s + Uses + At line 109 in file RTE\Device\LPC1768\startup_LPC17xx.s + At line 214 in file RTE\Device\LPC1768\startup_LPC17xx.s + +PWM1_IRQHandler 0000001A + +Symbol: PWM1_IRQHandler + Definitions + At line 227 in file RTE\Device\LPC1768\startup_LPC17xx.s + Uses + At line 86 in file RTE\Device\LPC1768\startup_LPC17xx.s + At line 191 in file RTE\Device\LPC1768\startup_LPC17xx.s + +PendSV_Handler 00000016 + +Symbol: PendSV_Handler + Definitions + At line 171 in file RTE\Device\LPC1768\startup_LPC17xx.s + Uses + At line 73 in file RTE\Device\LPC1768\startup_LPC17xx.s + At line 172 in file RTE\Device\LPC1768\startup_LPC17xx.s + +QEI_IRQHandler 0000001A + +Symbol: QEI_IRQHandler + Definitions + + + +ARM Macro Assembler Page 5 Alphabetic symbol ordering +Relocatable symbols + + At line 249 in file RTE\Device\LPC1768\startup_LPC17xx.s + Uses + At line 108 in file RTE\Device\LPC1768\startup_LPC17xx.s + At line 213 in file RTE\Device\LPC1768\startup_LPC17xx.s + +RIT_IRQHandler 0000001A + +Symbol: RIT_IRQHandler + Definitions + At line 247 in file RTE\Device\LPC1768\startup_LPC17xx.s + Uses + At line 106 in file RTE\Device\LPC1768\startup_LPC17xx.s + At line 211 in file RTE\Device\LPC1768\startup_LPC17xx.s + +RTC_IRQHandler 0000001A + +Symbol: RTC_IRQHandler + Definitions + At line 235 in file RTE\Device\LPC1768\startup_LPC17xx.s + Uses + At line 94 in file RTE\Device\LPC1768\startup_LPC17xx.s + At line 199 in file RTE\Device\LPC1768\startup_LPC17xx.s + +Reset_Handler 00000000 + +Symbol: Reset_Handler + Definitions + At line 125 in file RTE\Device\LPC1768\startup_LPC17xx.s + Uses + At line 60 in file RTE\Device\LPC1768\startup_LPC17xx.s + At line 126 in file RTE\Device\LPC1768\startup_LPC17xx.s + +SPI_IRQHandler 0000001A + +Symbol: SPI_IRQHandler + Definitions + At line 231 in file RTE\Device\LPC1768\startup_LPC17xx.s + Uses + At line 90 in file RTE\Device\LPC1768\startup_LPC17xx.s + At line 195 in file RTE\Device\LPC1768\startup_LPC17xx.s + +SSP0_IRQHandler 0000001A + +Symbol: SSP0_IRQHandler + Definitions + At line 232 in file RTE\Device\LPC1768\startup_LPC17xx.s + Uses + At line 91 in file RTE\Device\LPC1768\startup_LPC17xx.s + At line 196 in file RTE\Device\LPC1768\startup_LPC17xx.s + +SSP1_IRQHandler 0000001A + +Symbol: SSP1_IRQHandler + Definitions + At line 233 in file RTE\Device\LPC1768\startup_LPC17xx.s + Uses + At line 92 in file RTE\Device\LPC1768\startup_LPC17xx.s + At line 197 in file RTE\Device\LPC1768\startup_LPC17xx.s + + + + +ARM Macro Assembler Page 6 Alphabetic symbol ordering +Relocatable symbols + +SVC_Handler 00000012 + +Symbol: SVC_Handler + Definitions + At line 162 in file RTE\Device\LPC1768\startup_LPC17xx.s + Uses + At line 70 in file RTE\Device\LPC1768\startup_LPC17xx.s + At line 163 in file RTE\Device\LPC1768\startup_LPC17xx.s + +SysTick_Handler 00000018 + +Symbol: SysTick_Handler + Definitions + At line 175 in file RTE\Device\LPC1768\startup_LPC17xx.s + Uses + At line 74 in file RTE\Device\LPC1768\startup_LPC17xx.s + At line 176 in file RTE\Device\LPC1768\startup_LPC17xx.s + +TIMER0_IRQHandler 0000001A + +Symbol: TIMER0_IRQHandler + Definitions + At line 219 in file RTE\Device\LPC1768\startup_LPC17xx.s + Uses + At line 78 in file RTE\Device\LPC1768\startup_LPC17xx.s + At line 183 in file RTE\Device\LPC1768\startup_LPC17xx.s + +TIMER1_IRQHandler 0000001A + +Symbol: TIMER1_IRQHandler + Definitions + At line 220 in file RTE\Device\LPC1768\startup_LPC17xx.s + Uses + At line 79 in file RTE\Device\LPC1768\startup_LPC17xx.s + At line 184 in file RTE\Device\LPC1768\startup_LPC17xx.s + +TIMER2_IRQHandler 0000001A + +Symbol: TIMER2_IRQHandler + Definitions + At line 221 in file RTE\Device\LPC1768\startup_LPC17xx.s + Uses + At line 80 in file RTE\Device\LPC1768\startup_LPC17xx.s + At line 185 in file RTE\Device\LPC1768\startup_LPC17xx.s + +TIMER3_IRQHandler 0000001A + +Symbol: TIMER3_IRQHandler + Definitions + At line 222 in file RTE\Device\LPC1768\startup_LPC17xx.s + Uses + At line 81 in file RTE\Device\LPC1768\startup_LPC17xx.s + At line 186 in file RTE\Device\LPC1768\startup_LPC17xx.s + +UART0_IRQHandler 0000001A + +Symbol: UART0_IRQHandler + Definitions + At line 223 in file RTE\Device\LPC1768\startup_LPC17xx.s + + + +ARM Macro Assembler Page 7 Alphabetic symbol ordering +Relocatable symbols + + Uses + At line 82 in file RTE\Device\LPC1768\startup_LPC17xx.s + At line 187 in file RTE\Device\LPC1768\startup_LPC17xx.s + +UART1_IRQHandler 0000001A + +Symbol: UART1_IRQHandler + Definitions + At line 224 in file RTE\Device\LPC1768\startup_LPC17xx.s + Uses + At line 83 in file RTE\Device\LPC1768\startup_LPC17xx.s + At line 188 in file RTE\Device\LPC1768\startup_LPC17xx.s + +UART2_IRQHandler 0000001A + +Symbol: UART2_IRQHandler + Definitions + At line 225 in file RTE\Device\LPC1768\startup_LPC17xx.s + Uses + At line 84 in file RTE\Device\LPC1768\startup_LPC17xx.s + At line 189 in file RTE\Device\LPC1768\startup_LPC17xx.s + +UART3_IRQHandler 0000001A + +Symbol: UART3_IRQHandler + Definitions + At line 226 in file RTE\Device\LPC1768\startup_LPC17xx.s + Uses + At line 85 in file RTE\Device\LPC1768\startup_LPC17xx.s + At line 190 in file RTE\Device\LPC1768\startup_LPC17xx.s + +USBActivity_IRQHandler 0000001A + +Symbol: USBActivity_IRQHandler + Definitions + At line 251 in file RTE\Device\LPC1768\startup_LPC17xx.s + Uses + At line 110 in file RTE\Device\LPC1768\startup_LPC17xx.s + At line 215 in file RTE\Device\LPC1768\startup_LPC17xx.s + +USB_IRQHandler 0000001A + +Symbol: USB_IRQHandler + Definitions + At line 242 in file RTE\Device\LPC1768\startup_LPC17xx.s + Uses + At line 101 in file RTE\Device\LPC1768\startup_LPC17xx.s + At line 206 in file RTE\Device\LPC1768\startup_LPC17xx.s + +UsageFault_Handler 00000010 + +Symbol: UsageFault_Handler + Definitions + At line 158 in file RTE\Device\LPC1768\startup_LPC17xx.s + Uses + At line 65 in file RTE\Device\LPC1768\startup_LPC17xx.s + At line 159 in file RTE\Device\LPC1768\startup_LPC17xx.s + +WDT_IRQHandler 0000001A + + + +ARM Macro Assembler Page 8 Alphabetic symbol ordering +Relocatable symbols + + +Symbol: WDT_IRQHandler + Definitions + At line 218 in file RTE\Device\LPC1768\startup_LPC17xx.s + Uses + At line 77 in file RTE\Device\LPC1768\startup_LPC17xx.s + At line 182 in file RTE\Device\LPC1768\startup_LPC17xx.s + +__user_initial_stackheap 0000001C + +Symbol: __user_initial_stackheap + Definitions + At line 274 in file RTE\Device\LPC1768\startup_LPC17xx.s + Uses + At line 273 in file RTE\Device\LPC1768\startup_LPC17xx.s +Comment: __user_initial_stackheap used once +48 symbols + + + +ARM Macro Assembler Page 1 Alphabetic symbol ordering +Absolute symbols + +Heap_Size 00000000 + +Symbol: Heap_Size + Definitions + At line 42 in file RTE\Device\LPC1768\startup_LPC17xx.s + Uses + At line 46 in file RTE\Device\LPC1768\startup_LPC17xx.s + At line 278 in file RTE\Device\LPC1768\startup_LPC17xx.s + +Stack_Size 00000200 + +Symbol: Stack_Size + Definitions + At line 31 in file RTE\Device\LPC1768\startup_LPC17xx.s + Uses + At line 34 in file RTE\Device\LPC1768\startup_LPC17xx.s + At line 277 in file RTE\Device\LPC1768\startup_LPC17xx.s + +2 symbols + + + +ARM Macro Assembler Page 1 Alphabetic symbol ordering +External symbols + +SystemInit 00000000 + +Symbol: SystemInit + Definitions + At line 127 in file RTE\Device\LPC1768\startup_LPC17xx.s + Uses + At line 129 in file RTE\Device\LPC1768\startup_LPC17xx.s +Comment: SystemInit used once +__main 00000000 + +Symbol: __main + Definitions + At line 128 in file RTE\Device\LPC1768\startup_LPC17xx.s + Uses + At line 131 in file RTE\Device\LPC1768\startup_LPC17xx.s +Comment: __main used once +__use_two_region_memory 00000000 + +Symbol: __use_two_region_memory + Definitions + At line 272 in file RTE\Device\LPC1768\startup_LPC17xx.s + Uses + None +Comment: __use_two_region_memory unused +3 symbols +403 symbols in table diff --git a/F2024/coe718/labs/lab2/Objects/barrel_shifting.crf b/F2024/coe718/labs/lab2/Objects/barrel_shifting.crf new file mode 100755 index 0000000..bfce886 Binary files /dev/null and b/F2024/coe718/labs/lab2/Objects/barrel_shifting.crf differ diff --git a/F2024/coe718/labs/lab2/Objects/barrel_shifting.d b/F2024/coe718/labs/lab2/Objects/barrel_shifting.d new file mode 100755 index 0000000..76a312b --- /dev/null +++ b/F2024/coe718/labs/lab2/Objects/barrel_shifting.d @@ -0,0 +1,9 @@ +.\objects\barrel_shifting.o: Barrel_shifting\Barrel_shifting.c +.\objects\barrel_shifting.o: C:\Users\ECBME\AppData\Local\Arm\Packs\Keil\LPC1700_DFP\2.6.0\Device\Include\LPC17xx.h +.\objects\barrel_shifting.o: C:\Users\ECBME\AppData\Local\Arm\Packs\ARM\CMSIS\5.7.0\CMSIS\Core\Include\core_cm3.h +.\objects\barrel_shifting.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\stdint.h +.\objects\barrel_shifting.o: C:\Users\ECBME\AppData\Local\Arm\Packs\ARM\CMSIS\5.7.0\CMSIS\Core\Include\cmsis_version.h +.\objects\barrel_shifting.o: C:\Users\ECBME\AppData\Local\Arm\Packs\ARM\CMSIS\5.7.0\CMSIS\Core\Include\cmsis_compiler.h +.\objects\barrel_shifting.o: C:\Users\ECBME\AppData\Local\Arm\Packs\ARM\CMSIS\5.7.0\CMSIS\Core\Include\cmsis_armcc.h +.\objects\barrel_shifting.o: C:\Users\ECBME\AppData\Local\Arm\Packs\ARM\CMSIS\5.7.0\CMSIS\Core\Include\mpu_armv7.h +.\objects\barrel_shifting.o: C:\Users\ECBME\AppData\Local\Arm\Packs\Keil\LPC1700_DFP\2.6.0\Device\Include\system_LPC17xx.h diff --git a/F2024/coe718/labs/lab2/Objects/barrel_shifting.o b/F2024/coe718/labs/lab2/Objects/barrel_shifting.o new file mode 100755 index 0000000..001aa08 Binary files /dev/null and b/F2024/coe718/labs/lab2/Objects/barrel_shifting.o differ diff --git a/F2024/coe718/labs/lab2/Objects/bitband.axf b/F2024/coe718/labs/lab2/Objects/bitband.axf new file mode 100755 index 0000000..8f43d5e Binary files /dev/null and b/F2024/coe718/labs/lab2/Objects/bitband.axf differ diff --git a/F2024/coe718/labs/lab2/Objects/bitband.build_log.htm b/F2024/coe718/labs/lab2/Objects/bitband.build_log.htm new file mode 100755 index 0000000..0ee3205 --- /dev/null +++ b/F2024/coe718/labs/lab2/Objects/bitband.build_log.htm @@ -0,0 +1,108 @@ + + +
+
�Vision Build Log

+
Tool Versions:

+IDE-Version: �Vision V5.31.0.0
+Copyright (C) 2020 ARM Ltd and ARM Germany GmbH. All rights reserved.
+License Information: ECBME Dept. Ryerson University Flex license: MDK Professional 5.31 (Flex): 200 user(s) (mdk_pro) Operation stops: 4 Jul 2027
+ 
+Tool Versions:
+Toolchain:       MDK Professional 5.31 (Flex): 200 user(s)  Version: 5.31.0.0
+Toolchain Path:  C:\Keil_v5\ARM\ARMCC\Bin
+C Compiler:      Armcc.exe V5.06 update 6 (build 750)
+Assembler:       Armasm.exe V5.06 update 6 (build 750)
+Linker/Locator:  ArmLink.exe V5.06 update 6 (build 750)
+Library Manager: ArmAr.exe V5.06 update 6 (build 750)
+Hex Converter:   FromElf.exe V5.06 update 6 (build 750)
+CPU DLL:         SARMCM3.DLL V5.31.0.0
+Dialog DLL:      DARMP1.DLL V1.27.0.0
+Target DLL:      UL2CM3.DLL V1.163.4.0
+Dialog DLL:      TARMP1.DLL V1.26.0.0
+ 
+
Project:

+S:\documents\coe\718\labs\lab2\bitband.uvprojx
+Project File Date:  09/24/2024
+
+
Output:

+*** Using Compiler 'V5.06 update 6 (build 750)', folder: 'C:\Keil_v5\ARM\ARMCC\Bin'
+Build target 'Target 1'
+compiling bitband.c...
+bitbanding\bitband.c(115): warning:  #1-D: last line of file ends without a newline
+  }
+bitbanding\bitband.c: 1 warning, 0 errors
+linking...
+Program Size: Code=3322 RO-data=6534 RW-data=20 ZI-data=1812  
+".\Objects\bitband.axf" - 0 Error(s), 1 Warning(s).
+
+
Software Packages used:

+
+Package Vendor: ARM
+                http://www.keil.com/pack/ARM.CMSIS.5.7.0.pack
+                ARM.CMSIS.5.7.0
+                CMSIS (Cortex Microcontroller Software Interface Standard)
+   * Component: CORE Version: 5.4.0
+
+Package Vendor: Keil
+                http://www.keil.com/pack/Keil.ARM_Compiler.1.6.3.pack
+                Keil.ARM_Compiler.1.6.3
+                Keil ARM Compiler extensions for ARM Compiler 5 and ARM Compiler 6
+   * Component: Event Recorder Variant: DAP Version: 1.4.0
+
+Package Vendor: Keil
+                http://www.keil.com/pack/Keil.LPC1700_DFP.2.6.0.pack
+                Keil.LPC1700_DFP.2.6.0
+                NXP LPC1700 Series Device Support, Drivers and Examples for MCB1700 and LPC1788-32
+   * Component: LED Version: 1.0.0
+   * Component: GPIO Version: 1.1.0
+   * Component: PIN Version: 1.0.0
+   * Component: Startup Version: 1.0.0
+
+Package Vendor: Keil
+                http://www.keil.com/pack/Keil.MDK-Middleware.7.12.0.pack
+                Keil.MDK-Middleware.7.12.0
+                Middleware for Keil MDK-Professional and MDK-Plus
+   * Component: LED Version: 1.0.0
+
+
Collection of Component include folders:

+  .\RTE\Compiler
+  .\RTE\Device\LPC1768
+  .\RTE\_Target_1
+  C:\Users\ECBME\AppData\Local\Arm\Packs\ARM\CMSIS\5.7.0\CMSIS\Core\Include
+  C:\Users\ECBME\AppData\Local\Arm\Packs\Keil\ARM_Compiler\1.6.3\Include
+  C:\Users\ECBME\AppData\Local\Arm\Packs\Keil\LPC1700_DFP\2.6.0\Device\Include
+  C:\Users\ECBME\AppData\Local\Arm\Packs\Keil\LPC1700_DFP\2.6.0\RTE_Driver
+  C:\Users\ECBME\AppData\Local\Arm\Packs\Keil\MDK-Middleware\7.12.0\Board
+
+
Collection of Component Files used:

+
+   * Component: ::Board Support:LED:1.0.0 (API)
+      Include file:  Board\Board_LED.h
+
+   * Component: ARM::CMSIS:CORE:5.4.0
+
+   * Component: Keil.ARM Compiler::Compiler:Event Recorder:DAP:1.4.0
+      Include file:  Config\EventRecorderConf.h
+      Include file:  Include\EventRecorder.h
+      Source file:   Source\EventRecorder.c
+
+   * Component: Keil.MCB1700::Board Support:LED:1.0.0
+      Source file:   Boards\Keil\MCB1700\Common\LED_MCB1700.c
+
+   * Component: Keil::Device:GPIO:1.1.0
+      Include file:  RTE_Driver\GPIO_LPC17xx.h
+      Source file:   RTE_Driver\GPIO_LPC17xx.c
+
+   * Component: Keil::Device:PIN:1.0.0
+      Include file:  RTE_Driver\PIN_LPC17xx.h
+      Source file:   RTE_Driver\PIN_LPC17xx.c
+
+   * Component: Keil::Device:Startup:1.0.0
+      Source file:   Device\Source\ARM\startup_LPC17xx.s
+      Include file:  Device\Include\LPC17xx.h
+      Source file:   Device\Source\system_LPC17xx.c
+      Include file:  RTE_Driver\Config\RTE_Device.h
+Build Time Elapsed:  00:00:01
+
+ + diff --git a/F2024/coe718/labs/lab2/Objects/bitband.crf b/F2024/coe718/labs/lab2/Objects/bitband.crf new file mode 100755 index 0000000..34fc8d0 Binary files /dev/null and b/F2024/coe718/labs/lab2/Objects/bitband.crf differ diff --git a/F2024/coe718/labs/lab2/Objects/bitband.d b/F2024/coe718/labs/lab2/Objects/bitband.d new file mode 100755 index 0000000..75b3b67 --- /dev/null +++ b/F2024/coe718/labs/lab2/Objects/bitband.d @@ -0,0 +1,11 @@ +.\objects\bitband.o: bitbanding\bitband.c +.\objects\bitband.o: C:\Users\ECBME\AppData\Local\Arm\Packs\Keil\LPC1700_DFP\2.6.0\Device\Include\LPC17xx.h +.\objects\bitband.o: C:\Users\ECBME\AppData\Local\Arm\Packs\ARM\CMSIS\5.7.0\CMSIS\Core\Include\core_cm3.h +.\objects\bitband.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\stdint.h +.\objects\bitband.o: C:\Users\ECBME\AppData\Local\Arm\Packs\ARM\CMSIS\5.7.0\CMSIS\Core\Include\cmsis_version.h +.\objects\bitband.o: C:\Users\ECBME\AppData\Local\Arm\Packs\ARM\CMSIS\5.7.0\CMSIS\Core\Include\cmsis_compiler.h +.\objects\bitband.o: C:\Users\ECBME\AppData\Local\Arm\Packs\ARM\CMSIS\5.7.0\CMSIS\Core\Include\cmsis_armcc.h +.\objects\bitband.o: C:\Users\ECBME\AppData\Local\Arm\Packs\ARM\CMSIS\5.7.0\CMSIS\Core\Include\mpu_armv7.h +.\objects\bitband.o: C:\Users\ECBME\AppData\Local\Arm\Packs\Keil\LPC1700_DFP\2.6.0\Device\Include\system_LPC17xx.h +.\objects\bitband.o: bitbanding\GLCD.h +.\objects\bitband.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\stdio.h diff --git a/F2024/coe718/labs/lab2/Objects/bitband.htm b/F2024/coe718/labs/lab2/Objects/bitband.htm new file mode 100755 index 0000000..ba53a95 --- /dev/null +++ b/F2024/coe718/labs/lab2/Objects/bitband.htm @@ -0,0 +1,622 @@ + + +Static Call Graph - [.\Objects\bitband.axf] +
+

Static Call Graph for image .\Objects\bitband.axf

+

#<CALLGRAPH># ARM Linker, 5060750: Last Updated: Tue Sep 24 23:27:23 2024 +

+

Maximum Stack Usage = 128 bytes + Unknown(Functions without stacksize, Cycles, Untraceable Function Pointers)

+Call chain for Maximum Stack Depth:

+SysTick_Handler ⇒ method2lcd ⇒ GLCD_DisplayString ⇒ GLCD_DisplayChar ⇒ GLCD_DrawChar ⇒ GLCD_SetWindow ⇒ wr_reg ⇒ wr_dat +

+

+Functions with no stack information +

+ +

+

+Mutually Recursive functions +

  • NMI_Handler   ⇒   NMI_Handler
    +
  • HardFault_Handler   ⇒   HardFault_Handler
    +
  • MemManage_Handler   ⇒   MemManage_Handler
    +
  • BusFault_Handler   ⇒   BusFault_Handler
    +
  • UsageFault_Handler   ⇒   UsageFault_Handler
    +
  • SVC_Handler   ⇒   SVC_Handler
    +
  • DebugMon_Handler   ⇒   DebugMon_Handler
    +
  • PendSV_Handler   ⇒   PendSV_Handler
    +
  • ADC_IRQHandler   ⇒   ADC_IRQHandler
    + +

    +

    +Function Pointers +

      +
    • ADC_IRQHandler from startup_lpc17xx.o(.text) referenced from startup_lpc17xx.o(RESET) +
    • BOD_IRQHandler from startup_lpc17xx.o(.text) referenced from startup_lpc17xx.o(RESET) +
    • BusFault_Handler from startup_lpc17xx.o(.text) referenced from startup_lpc17xx.o(RESET) +
    • CANActivity_IRQHandler from startup_lpc17xx.o(.text) referenced from startup_lpc17xx.o(RESET) +
    • CAN_IRQHandler from startup_lpc17xx.o(.text) referenced from startup_lpc17xx.o(RESET) +
    • DMA_IRQHandler from startup_lpc17xx.o(.text) referenced from startup_lpc17xx.o(RESET) +
    • DebugMon_Handler from startup_lpc17xx.o(.text) referenced from startup_lpc17xx.o(RESET) +
    • EINT0_IRQHandler from startup_lpc17xx.o(.text) referenced from startup_lpc17xx.o(RESET) +
    • EINT1_IRQHandler from startup_lpc17xx.o(.text) referenced from startup_lpc17xx.o(RESET) +
    • EINT2_IRQHandler from startup_lpc17xx.o(.text) referenced from startup_lpc17xx.o(RESET) +
    • EINT3_IRQHandler from startup_lpc17xx.o(.text) referenced from startup_lpc17xx.o(RESET) +
    • ENET_IRQHandler from startup_lpc17xx.o(.text) referenced from startup_lpc17xx.o(RESET) +
    • HardFault_Handler from startup_lpc17xx.o(.text) referenced from startup_lpc17xx.o(RESET) +
    • I2C0_IRQHandler from startup_lpc17xx.o(.text) referenced from startup_lpc17xx.o(RESET) +
    • I2C1_IRQHandler from startup_lpc17xx.o(.text) referenced from startup_lpc17xx.o(RESET) +
    • I2C2_IRQHandler from startup_lpc17xx.o(.text) referenced from startup_lpc17xx.o(RESET) +
    • I2S_IRQHandler from startup_lpc17xx.o(.text) referenced from startup_lpc17xx.o(RESET) +
    • MCPWM_IRQHandler from startup_lpc17xx.o(.text) referenced from startup_lpc17xx.o(RESET) +
    • MemManage_Handler from startup_lpc17xx.o(.text) referenced from startup_lpc17xx.o(RESET) +
    • NMI_Handler from startup_lpc17xx.o(.text) referenced from startup_lpc17xx.o(RESET) +
    • PLL0_IRQHandler from startup_lpc17xx.o(.text) referenced from startup_lpc17xx.o(RESET) +
    • PLL1_IRQHandler from startup_lpc17xx.o(.text) referenced from startup_lpc17xx.o(RESET) +
    • PWM1_IRQHandler from startup_lpc17xx.o(.text) referenced from startup_lpc17xx.o(RESET) +
    • PendSV_Handler from startup_lpc17xx.o(.text) referenced from startup_lpc17xx.o(RESET) +
    • QEI_IRQHandler from startup_lpc17xx.o(.text) referenced from startup_lpc17xx.o(RESET) +
    • RIT_IRQHandler from startup_lpc17xx.o(.text) referenced from startup_lpc17xx.o(RESET) +
    • RTC_IRQHandler from startup_lpc17xx.o(.text) referenced from startup_lpc17xx.o(RESET) +
    • Reset_Handler from startup_lpc17xx.o(.text) referenced from startup_lpc17xx.o(RESET) +
    • SPI_IRQHandler from startup_lpc17xx.o(.text) referenced from startup_lpc17xx.o(RESET) +
    • SSP0_IRQHandler from startup_lpc17xx.o(.text) referenced from startup_lpc17xx.o(RESET) +
    • SSP1_IRQHandler from startup_lpc17xx.o(.text) referenced from startup_lpc17xx.o(RESET) +
    • SVC_Handler from startup_lpc17xx.o(.text) referenced from startup_lpc17xx.o(RESET) +
    • SysTick_Handler from bitband.o(i.SysTick_Handler) referenced from startup_lpc17xx.o(RESET) +
    • SystemInit from system_lpc17xx.o(i.SystemInit) referenced from startup_lpc17xx.o(.text) +
    • TIMER0_IRQHandler from startup_lpc17xx.o(.text) referenced from startup_lpc17xx.o(RESET) +
    • TIMER1_IRQHandler from startup_lpc17xx.o(.text) referenced from startup_lpc17xx.o(RESET) +
    • TIMER2_IRQHandler from startup_lpc17xx.o(.text) referenced from startup_lpc17xx.o(RESET) +
    • TIMER3_IRQHandler from startup_lpc17xx.o(.text) referenced from startup_lpc17xx.o(RESET) +
    • UART0_IRQHandler from startup_lpc17xx.o(.text) referenced from startup_lpc17xx.o(RESET) +
    • UART1_IRQHandler from startup_lpc17xx.o(.text) referenced from startup_lpc17xx.o(RESET) +
    • UART2_IRQHandler from startup_lpc17xx.o(.text) referenced from startup_lpc17xx.o(RESET) +
    • UART3_IRQHandler from startup_lpc17xx.o(.text) referenced from startup_lpc17xx.o(RESET) +
    • USBActivity_IRQHandler from startup_lpc17xx.o(.text) referenced from startup_lpc17xx.o(RESET) +
    • USB_IRQHandler from startup_lpc17xx.o(.text) referenced from startup_lpc17xx.o(RESET) +
    • UsageFault_Handler from startup_lpc17xx.o(.text) referenced from startup_lpc17xx.o(RESET) +
    • WDT_IRQHandler from startup_lpc17xx.o(.text) referenced from startup_lpc17xx.o(RESET) +
    • __main from __main.o(!!!main) referenced from startup_lpc17xx.o(.text) +
    +

    +

    +Global Symbols +

    +

    __main (Thumb, 8 bytes, Stack size 0 bytes, __main.o(!!!main)) +

    [Calls]

    • >>   __rt_entry +
    • >>   __scatterload +
    + +

    __scatterload (Thumb, 0 bytes, Stack size unknown bytes, __scatter.o(!!!scatter)) +

    [Called By]

    • >>   __main +
    + +

    __scatterload_rt2 (Thumb, 44 bytes, Stack size unknown bytes, __scatter.o(!!!scatter), UNUSED) +

    [Calls]

    • >>   __rt_entry +
    + +

    __scatterload_rt2_thumb_only (Thumb, 0 bytes, Stack size unknown bytes, __scatter.o(!!!scatter), UNUSED) + +

    __scatterload_null (Thumb, 0 bytes, Stack size unknown bytes, __scatter.o(!!!scatter), UNUSED) + +

    __scatterload_copy (Thumb, 26 bytes, Stack size unknown bytes, __scatter_copy.o(!!handler_copy), UNUSED) +

    [Calls]

    • >>   __scatterload_copy +
    +
    [Called By]
    • >>   __scatterload_copy +
    + +

    __scatterload_zeroinit (Thumb, 28 bytes, Stack size unknown bytes, __scatter_zi.o(!!handler_zi), UNUSED) + +

    __rt_lib_init (Thumb, 0 bytes, Stack size unknown bytes, libinit.o(.ARM.Collect$$libinit$$00000000)) +

    [Called By]

    • >>   __rt_entry_li +
    + +

    __rt_lib_init_alloca_1 (Thumb, 0 bytes, Stack size unknown bytes, libinit2.o(.ARM.Collect$$libinit$$0000002E)) + +

    __rt_lib_init_argv_1 (Thumb, 0 bytes, Stack size unknown bytes, libinit2.o(.ARM.Collect$$libinit$$0000002C)) + +

    __rt_lib_init_atexit_1 (Thumb, 0 bytes, Stack size unknown bytes, libinit2.o(.ARM.Collect$$libinit$$0000001B)) + +

    __rt_lib_init_clock_1 (Thumb, 0 bytes, Stack size unknown bytes, libinit2.o(.ARM.Collect$$libinit$$00000021)) + +

    __rt_lib_init_cpp_1 (Thumb, 0 bytes, Stack size unknown bytes, libinit2.o(.ARM.Collect$$libinit$$00000032)) + +

    __rt_lib_init_exceptions_1 (Thumb, 0 bytes, Stack size unknown bytes, libinit2.o(.ARM.Collect$$libinit$$00000030)) + +

    __rt_lib_init_fp_1 (Thumb, 0 bytes, Stack size unknown bytes, libinit2.o(.ARM.Collect$$libinit$$00000002)) + +

    __rt_lib_init_fp_trap_1 (Thumb, 0 bytes, Stack size unknown bytes, libinit2.o(.ARM.Collect$$libinit$$0000001F)) + +

    __rt_lib_init_getenv_1 (Thumb, 0 bytes, Stack size unknown bytes, libinit2.o(.ARM.Collect$$libinit$$00000023)) + +

    __rt_lib_init_heap_1 (Thumb, 0 bytes, Stack size unknown bytes, libinit2.o(.ARM.Collect$$libinit$$0000000A)) + +

    __rt_lib_init_lc_collate_1 (Thumb, 0 bytes, Stack size unknown bytes, libinit2.o(.ARM.Collect$$libinit$$00000011)) + +

    __rt_lib_init_lc_ctype_1 (Thumb, 0 bytes, Stack size unknown bytes, libinit2.o(.ARM.Collect$$libinit$$00000013)) + +

    __rt_lib_init_lc_monetary_1 (Thumb, 0 bytes, Stack size unknown bytes, libinit2.o(.ARM.Collect$$libinit$$00000015)) + +

    __rt_lib_init_lc_numeric_1 (Thumb, 0 bytes, Stack size unknown bytes, libinit2.o(.ARM.Collect$$libinit$$00000017)) + +

    __rt_lib_init_lc_time_1 (Thumb, 0 bytes, Stack size unknown bytes, libinit2.o(.ARM.Collect$$libinit$$00000019)) + +

    __rt_lib_init_preinit_1 (Thumb, 0 bytes, Stack size unknown bytes, libinit2.o(.ARM.Collect$$libinit$$00000004)) + +

    __rt_lib_init_rand_1 (Thumb, 0 bytes, Stack size unknown bytes, libinit2.o(.ARM.Collect$$libinit$$0000000E)) + +

    __rt_lib_init_return (Thumb, 0 bytes, Stack size unknown bytes, libinit2.o(.ARM.Collect$$libinit$$00000033)) + +

    __rt_lib_init_signal_1 (Thumb, 0 bytes, Stack size unknown bytes, libinit2.o(.ARM.Collect$$libinit$$0000001D)) + +

    __rt_lib_init_stdio_1 (Thumb, 0 bytes, Stack size unknown bytes, libinit2.o(.ARM.Collect$$libinit$$00000025)) + +

    __rt_lib_init_user_alloc_1 (Thumb, 0 bytes, Stack size unknown bytes, libinit2.o(.ARM.Collect$$libinit$$0000000C)) + +

    __rt_lib_shutdown (Thumb, 0 bytes, Stack size unknown bytes, libshutdown.o(.ARM.Collect$$libshutdown$$00000000)) +

    [Called By]

    • >>   __rt_exit_ls +
    + +

    __rt_lib_shutdown_cpp_1 (Thumb, 0 bytes, Stack size unknown bytes, libshutdown2.o(.ARM.Collect$$libshutdown$$00000002)) + +

    __rt_lib_shutdown_fp_trap_1 (Thumb, 0 bytes, Stack size unknown bytes, libshutdown2.o(.ARM.Collect$$libshutdown$$00000007)) + +

    __rt_lib_shutdown_heap_1 (Thumb, 0 bytes, Stack size unknown bytes, libshutdown2.o(.ARM.Collect$$libshutdown$$0000000F)) + +

    __rt_lib_shutdown_return (Thumb, 0 bytes, Stack size unknown bytes, libshutdown2.o(.ARM.Collect$$libshutdown$$00000010)) + +

    __rt_lib_shutdown_signal_1 (Thumb, 0 bytes, Stack size unknown bytes, libshutdown2.o(.ARM.Collect$$libshutdown$$0000000A)) + +

    __rt_lib_shutdown_stdio_1 (Thumb, 0 bytes, Stack size unknown bytes, libshutdown2.o(.ARM.Collect$$libshutdown$$00000004)) + +

    __rt_lib_shutdown_user_alloc_1 (Thumb, 0 bytes, Stack size unknown bytes, libshutdown2.o(.ARM.Collect$$libshutdown$$0000000C)) + +

    __rt_entry (Thumb, 0 bytes, Stack size unknown bytes, __rtentry.o(.ARM.Collect$$rtentry$$00000000)) +

    [Called By]

    • >>   __main +
    • >>   __scatterload_rt2 +
    + +

    __rt_entry_presh_1 (Thumb, 0 bytes, Stack size unknown bytes, __rtentry2.o(.ARM.Collect$$rtentry$$00000002)) + +

    __rt_entry_sh (Thumb, 0 bytes, Stack size unknown bytes, __rtentry4.o(.ARM.Collect$$rtentry$$00000004)) +

    [Stack]

    • Max Depth = 8 + Unknown Stack Size +
    • Call Chain = __rt_entry_sh ⇒ __user_setup_stackheap +
    +
    [Calls]
    • >>   __user_setup_stackheap +
    + +

    __rt_entry_li (Thumb, 0 bytes, Stack size unknown bytes, __rtentry2.o(.ARM.Collect$$rtentry$$0000000A)) +

    [Calls]

    • >>   __rt_lib_init +
    + +

    __rt_entry_postsh_1 (Thumb, 0 bytes, Stack size unknown bytes, __rtentry2.o(.ARM.Collect$$rtentry$$00000009)) + +

    __rt_entry_main (Thumb, 0 bytes, Stack size unknown bytes, __rtentry2.o(.ARM.Collect$$rtentry$$0000000D)) +

    [Stack]

    • Max Depth = 120 + Unknown Stack Size +
    • Call Chain = __rt_entry_main ⇒ main ⇒ GLCD_DisplayString ⇒ GLCD_DisplayChar ⇒ GLCD_DrawChar ⇒ GLCD_SetWindow ⇒ wr_reg ⇒ wr_dat +
    +
    [Calls]
    • >>   exit +
    • >>   main +
    + +

    __rt_entry_postli_1 (Thumb, 0 bytes, Stack size unknown bytes, __rtentry2.o(.ARM.Collect$$rtentry$$0000000C)) + +

    __rt_exit (Thumb, 0 bytes, Stack size unknown bytes, rtexit.o(.ARM.Collect$$rtexit$$00000000)) +

    [Called By]

    • >>   exit +
    + +

    __rt_exit_ls (Thumb, 0 bytes, Stack size unknown bytes, rtexit2.o(.ARM.Collect$$rtexit$$00000003)) +

    [Calls]

    • >>   __rt_lib_shutdown +
    + +

    __rt_exit_prels_1 (Thumb, 0 bytes, Stack size unknown bytes, rtexit2.o(.ARM.Collect$$rtexit$$00000002)) + +

    __rt_exit_exit (Thumb, 0 bytes, Stack size unknown bytes, rtexit2.o(.ARM.Collect$$rtexit$$00000004)) +

    [Calls]

    • >>   _sys_exit +
    + +

    Reset_Handler (Thumb, 8 bytes, Stack size 0 bytes, startup_lpc17xx.o(.text)) +
    [Address Reference Count : 1]

    • startup_lpc17xx.o(RESET) +
    +

    NMI_Handler (Thumb, 2 bytes, Stack size 0 bytes, startup_lpc17xx.o(.text)) +

    [Calls]

    • >>   NMI_Handler +
    +
    [Called By]
    • >>   NMI_Handler +
    +
    [Address Reference Count : 1]
    • startup_lpc17xx.o(RESET) +
    +

    HardFault_Handler (Thumb, 2 bytes, Stack size 0 bytes, startup_lpc17xx.o(.text)) +

    [Calls]

    • >>   HardFault_Handler +
    +
    [Called By]
    • >>   HardFault_Handler +
    +
    [Address Reference Count : 1]
    • startup_lpc17xx.o(RESET) +
    +

    MemManage_Handler (Thumb, 2 bytes, Stack size 0 bytes, startup_lpc17xx.o(.text)) +

    [Calls]

    • >>   MemManage_Handler +
    +
    [Called By]
    • >>   MemManage_Handler +
    +
    [Address Reference Count : 1]
    • startup_lpc17xx.o(RESET) +
    +

    BusFault_Handler (Thumb, 2 bytes, Stack size 0 bytes, startup_lpc17xx.o(.text)) +

    [Calls]

    • >>   BusFault_Handler +
    +
    [Called By]
    • >>   BusFault_Handler +
    +
    [Address Reference Count : 1]
    • startup_lpc17xx.o(RESET) +
    +

    UsageFault_Handler (Thumb, 2 bytes, Stack size 0 bytes, startup_lpc17xx.o(.text)) +

    [Calls]

    • >>   UsageFault_Handler +
    +
    [Called By]
    • >>   UsageFault_Handler +
    +
    [Address Reference Count : 1]
    • startup_lpc17xx.o(RESET) +
    +

    SVC_Handler (Thumb, 2 bytes, Stack size 0 bytes, startup_lpc17xx.o(.text)) +

    [Calls]

    • >>   SVC_Handler +
    +
    [Called By]
    • >>   SVC_Handler +
    +
    [Address Reference Count : 1]
    • startup_lpc17xx.o(RESET) +
    +

    DebugMon_Handler (Thumb, 2 bytes, Stack size 0 bytes, startup_lpc17xx.o(.text)) +

    [Calls]

    • >>   DebugMon_Handler +
    +
    [Called By]
    • >>   DebugMon_Handler +
    +
    [Address Reference Count : 1]
    • startup_lpc17xx.o(RESET) +
    +

    PendSV_Handler (Thumb, 2 bytes, Stack size 0 bytes, startup_lpc17xx.o(.text)) +

    [Calls]

    • >>   PendSV_Handler +
    +
    [Called By]
    • >>   PendSV_Handler +
    +
    [Address Reference Count : 1]
    • startup_lpc17xx.o(RESET) +
    +

    ADC_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_lpc17xx.o(.text)) +

    [Calls]

    • >>   ADC_IRQHandler +
    +
    [Called By]
    • >>   ADC_IRQHandler +
    +
    [Address Reference Count : 1]
    • startup_lpc17xx.o(RESET) +
    +

    BOD_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_lpc17xx.o(.text)) +
    [Address Reference Count : 1]

    • startup_lpc17xx.o(RESET) +
    +

    CANActivity_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_lpc17xx.o(.text)) +
    [Address Reference Count : 1]

    • startup_lpc17xx.o(RESET) +
    +

    CAN_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_lpc17xx.o(.text)) +
    [Address Reference Count : 1]

    • startup_lpc17xx.o(RESET) +
    +

    DMA_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_lpc17xx.o(.text)) +
    [Address Reference Count : 1]

    • startup_lpc17xx.o(RESET) +
    +

    EINT0_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_lpc17xx.o(.text)) +
    [Address Reference Count : 1]

    • startup_lpc17xx.o(RESET) +
    +

    EINT1_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_lpc17xx.o(.text)) +
    [Address Reference Count : 1]

    • startup_lpc17xx.o(RESET) +
    +

    EINT2_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_lpc17xx.o(.text)) +
    [Address Reference Count : 1]

    • startup_lpc17xx.o(RESET) +
    +

    EINT3_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_lpc17xx.o(.text)) +
    [Address Reference Count : 1]

    • startup_lpc17xx.o(RESET) +
    +

    ENET_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_lpc17xx.o(.text)) +
    [Address Reference Count : 1]

    • startup_lpc17xx.o(RESET) +
    +

    I2C0_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_lpc17xx.o(.text)) +
    [Address Reference Count : 1]

    • startup_lpc17xx.o(RESET) +
    +

    I2C1_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_lpc17xx.o(.text)) +
    [Address Reference Count : 1]

    • startup_lpc17xx.o(RESET) +
    +

    I2C2_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_lpc17xx.o(.text)) +
    [Address Reference Count : 1]

    • startup_lpc17xx.o(RESET) +
    +

    I2S_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_lpc17xx.o(.text)) +
    [Address Reference Count : 1]

    • startup_lpc17xx.o(RESET) +
    +

    MCPWM_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_lpc17xx.o(.text)) +
    [Address Reference Count : 1]

    • startup_lpc17xx.o(RESET) +
    +

    PLL0_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_lpc17xx.o(.text)) +
    [Address Reference Count : 1]

    • startup_lpc17xx.o(RESET) +
    +

    PLL1_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_lpc17xx.o(.text)) +
    [Address Reference Count : 1]

    • startup_lpc17xx.o(RESET) +
    +

    PWM1_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_lpc17xx.o(.text)) +
    [Address Reference Count : 1]

    • startup_lpc17xx.o(RESET) +
    +

    QEI_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_lpc17xx.o(.text)) +
    [Address Reference Count : 1]

    • startup_lpc17xx.o(RESET) +
    +

    RIT_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_lpc17xx.o(.text)) +
    [Address Reference Count : 1]

    • startup_lpc17xx.o(RESET) +
    +

    RTC_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_lpc17xx.o(.text)) +
    [Address Reference Count : 1]

    • startup_lpc17xx.o(RESET) +
    +

    SPI_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_lpc17xx.o(.text)) +
    [Address Reference Count : 1]

    • startup_lpc17xx.o(RESET) +
    +

    SSP0_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_lpc17xx.o(.text)) +
    [Address Reference Count : 1]

    • startup_lpc17xx.o(RESET) +
    +

    SSP1_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_lpc17xx.o(.text)) +
    [Address Reference Count : 1]

    • startup_lpc17xx.o(RESET) +
    +

    TIMER0_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_lpc17xx.o(.text)) +
    [Address Reference Count : 1]

    • startup_lpc17xx.o(RESET) +
    +

    TIMER1_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_lpc17xx.o(.text)) +
    [Address Reference Count : 1]

    • startup_lpc17xx.o(RESET) +
    +

    TIMER2_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_lpc17xx.o(.text)) +
    [Address Reference Count : 1]

    • startup_lpc17xx.o(RESET) +
    +

    TIMER3_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_lpc17xx.o(.text)) +
    [Address Reference Count : 1]

    • startup_lpc17xx.o(RESET) +
    +

    UART0_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_lpc17xx.o(.text)) +
    [Address Reference Count : 1]

    • startup_lpc17xx.o(RESET) +
    +

    UART1_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_lpc17xx.o(.text)) +
    [Address Reference Count : 1]

    • startup_lpc17xx.o(RESET) +
    +

    UART2_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_lpc17xx.o(.text)) +
    [Address Reference Count : 1]

    • startup_lpc17xx.o(RESET) +
    +

    UART3_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_lpc17xx.o(.text)) +
    [Address Reference Count : 1]

    • startup_lpc17xx.o(RESET) +
    +

    USBActivity_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_lpc17xx.o(.text)) +
    [Address Reference Count : 1]

    • startup_lpc17xx.o(RESET) +
    +

    USB_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_lpc17xx.o(.text)) +
    [Address Reference Count : 1]

    • startup_lpc17xx.o(RESET) +
    +

    WDT_IRQHandler (Thumb, 0 bytes, Stack size 0 bytes, startup_lpc17xx.o(.text)) +
    [Address Reference Count : 1]

    • startup_lpc17xx.o(RESET) +
    +

    __user_initial_stackheap (Thumb, 0 bytes, Stack size unknown bytes, startup_lpc17xx.o(.text)) +

    [Called By]

    • >>   __user_setup_stackheap +
    + +

    __use_two_region_memory (Thumb, 2 bytes, Stack size 0 bytes, heapauxi.o(.text), UNUSED) + +

    __rt_heap_escrow$2region (Thumb, 2 bytes, Stack size 0 bytes, heapauxi.o(.text), UNUSED) + +

    __rt_heap_expand$2region (Thumb, 2 bytes, Stack size 0 bytes, heapauxi.o(.text), UNUSED) + +

    __user_setup_stackheap (Thumb, 74 bytes, Stack size 8 bytes, sys_stackheap_outer.o(.text)) +

    [Stack]

    • Max Depth = 8 + Unknown Stack Size +
    • Call Chain = __user_setup_stackheap +
    +
    [Calls]
    • >>   __user_perproc_libspace +
    • >>   __user_initial_stackheap +
    +
    [Called By]
    • >>   __rt_entry_sh +
    + +

    exit (Thumb, 18 bytes, Stack size 8 bytes, exit.o(.text)) +

    [Stack]

    • Max Depth = 8 + Unknown Stack Size +
    • Call Chain = exit +
    +
    [Calls]
    • >>   __rt_exit +
    +
    [Called By]
    • >>   __rt_entry_main +
    + +

    __user_libspace (Thumb, 8 bytes, Stack size 0 bytes, libspace.o(.text), UNUSED) + +

    __user_perproc_libspace (Thumb, 0 bytes, Stack size 0 bytes, libspace.o(.text)) +

    [Called By]

    • >>   __user_setup_stackheap +
    + +

    __user_perthread_libspace (Thumb, 0 bytes, Stack size 0 bytes, libspace.o(.text), UNUSED) + +

    _sys_exit (Thumb, 8 bytes, Stack size 0 bytes, sys_exit.o(.text)) +

    [Called By]

    • >>   __rt_exit_exit +
    + +

    __I$use$semihosting (Thumb, 0 bytes, Stack size 0 bytes, use_no_semi.o(.text), UNUSED) + +

    __use_no_semihosting_swi (Thumb, 2 bytes, Stack size 0 bytes, use_no_semi.o(.text), UNUSED) + +

    __semihosting_library_function (Thumb, 0 bytes, Stack size unknown bytes, indicate_semi.o(.text), UNUSED) + +

    GLCD_Clear (Thumb, 44 bytes, Stack size 16 bytes, glcd_spi_lpc1700.o(i.GLCD_Clear)) +

    [Stack]

    • Max Depth = 64
    • Call Chain = GLCD_Clear ⇒ GLCD_WindowMax ⇒ GLCD_SetWindow ⇒ wr_reg ⇒ wr_dat +
    +
    [Calls]
    • >>   GLCD_WindowMax +
    • >>   wr_dat_start +
    • >>   wr_dat_only +
    • >>   wr_cmd +
    +
    [Called By]
    • >>   main +
    + +

    GLCD_DisplayChar (Thumb, 66 bytes, Stack size 16 bytes, glcd_spi_lpc1700.o(i.GLCD_DisplayChar)) +

    [Stack]

    • Max Depth = 96
    • Call Chain = GLCD_DisplayChar ⇒ GLCD_DrawChar ⇒ GLCD_SetWindow ⇒ wr_reg ⇒ wr_dat +
    +
    [Calls]
    • >>   GLCD_DrawChar +
    +
    [Called By]
    • >>   GLCD_DisplayString +
    + +

    GLCD_DisplayString (Thumb, 38 bytes, Stack size 24 bytes, glcd_spi_lpc1700.o(i.GLCD_DisplayString)) +

    [Stack]

    • Max Depth = 120
    • Call Chain = GLCD_DisplayString ⇒ GLCD_DisplayChar ⇒ GLCD_DrawChar ⇒ GLCD_SetWindow ⇒ wr_reg ⇒ wr_dat +
    +
    [Calls]
    • >>   GLCD_DisplayChar +
    +
    [Called By]
    • >>   main +
    • >>   method2lcd +
    + +

    GLCD_SetBackColor (Thumb, 6 bytes, Stack size 0 bytes, glcd_spi_lpc1700.o(i.GLCD_SetBackColor)) +

    [Called By]

    • >>   main +
    + +

    GLCD_SetTextColor (Thumb, 6 bytes, Stack size 0 bytes, glcd_spi_lpc1700.o(i.GLCD_SetTextColor)) +

    [Called By]

    • >>   main +
    + +

    GLCD_WindowMax (Thumb, 14 bytes, Stack size 0 bytes, glcd_spi_lpc1700.o(i.GLCD_WindowMax)) +

    [Stack]

    • Max Depth = 48
    • Call Chain = GLCD_WindowMax ⇒ GLCD_SetWindow ⇒ wr_reg ⇒ wr_dat +
    +
    [Calls]
    • >>   GLCD_SetWindow +
    +
    [Called By]
    • >>   GLCD_Clear +
    + +

    GLCD_DrawChar (Thumb, 136 bytes, Stack size 32 bytes, glcd_spi_lpc1700.o(i.GLCD_DrawChar)) +

    [Stack]

    • Max Depth = 80
    • Call Chain = GLCD_DrawChar ⇒ GLCD_SetWindow ⇒ wr_reg ⇒ wr_dat +
    +
    [Calls]
    • >>   GLCD_SetWindow +
    • >>   wr_dat_start +
    • >>   wr_dat_only +
    • >>   wr_cmd +
    +
    [Called By]
    • >>   GLCD_DisplayChar +
    + +

    GLCD_Init (Thumb, 1476 bytes, Stack size 24 bytes, glcd_spi_lpc1700.o(i.GLCD_Init)) +

    [Stack]

    • Max Depth = 80
    • Call Chain = GLCD_Init ⇒ rd_id_man ⇒ spi_tran_man +
    +
    [Calls]
    • >>   wr_reg +
    • >>   wr_cmd +
    • >>   spi_tran +
    • >>   rd_id_man +
    • >>   delay +
    +
    [Called By]
    • >>   main +
    + +

    GLCD_SetWindow (Thumb, 148 bytes, Stack size 24 bytes, glcd_spi_lpc1700.o(i.GLCD_SetWindow)) +

    [Stack]

    • Max Depth = 48
    • Call Chain = GLCD_SetWindow ⇒ wr_reg ⇒ wr_dat +
    +
    [Calls]
    • >>   wr_reg +
    +
    [Called By]
    • >>   GLCD_WindowMax +
    • >>   GLCD_DrawChar +
    + +

    SysTick_Handler (Thumb, 116 bytes, Stack size 8 bytes, bitband.o(i.SysTick_Handler)) +

    [Stack]

    • Max Depth = 128
    • Call Chain = SysTick_Handler ⇒ method2lcd ⇒ GLCD_DisplayString ⇒ GLCD_DisplayChar ⇒ GLCD_DrawChar ⇒ GLCD_SetWindow ⇒ wr_reg ⇒ wr_dat +
    +
    [Calls]
    • >>   method2lcd +
    +
    [Address Reference Count : 1]
    • startup_lpc17xx.o(RESET) +
    +

    SystemInit (Thumb, 192 bytes, Stack size 16 bytes, system_lpc17xx.o(i.SystemInit)) +

    [Stack]

    • Max Depth = 16
    • Call Chain = SystemInit +
    +
    [Address Reference Count : 1]
    • startup_lpc17xx.o(.text) +
    +

    main (Thumb, 138 bytes, Stack size 0 bytes, bitband.o(i.main)) +

    [Stack]

    • Max Depth = 120
    • Call Chain = main ⇒ GLCD_DisplayString ⇒ GLCD_DisplayChar ⇒ GLCD_DrawChar ⇒ GLCD_SetWindow ⇒ wr_reg ⇒ wr_dat +
    +
    [Calls]
    • >>   GLCD_SetTextColor +
    • >>   GLCD_SetBackColor +
    • >>   GLCD_Init +
    • >>   GLCD_DisplayString +
    • >>   GLCD_Clear +
    +
    [Called By]
    • >>   __rt_entry_main +
    +

    +

    +Local Symbols +

    +

    method2lcd (Thumb, 12 bytes, Stack size 0 bytes, bitband.o(i.method2lcd)) +

    [Stack]

    • Max Depth = 120
    • Call Chain = method2lcd ⇒ GLCD_DisplayString ⇒ GLCD_DisplayChar ⇒ GLCD_DrawChar ⇒ GLCD_SetWindow ⇒ wr_reg ⇒ wr_dat +
    +
    [Calls]
    • >>   GLCD_DisplayString +
    +
    [Called By]
    • >>   SysTick_Handler +
    + +

    delay (Thumb, 8 bytes, Stack size 0 bytes, glcd_spi_lpc1700.o(i.delay)) +

    [Called By]

    • >>   spi_tran_man +
    • >>   GLCD_Init +
    + +

    rd_id_man (Thumb, 104 bytes, Stack size 16 bytes, glcd_spi_lpc1700.o(i.rd_id_man)) +

    [Stack]

    • Max Depth = 56
    • Call Chain = rd_id_man ⇒ spi_tran_man +
    +
    [Calls]
    • >>   spi_tran_man +
    +
    [Called By]
    • >>   GLCD_Init +
    + +

    spi_tran (Thumb, 16 bytes, Stack size 0 bytes, glcd_spi_lpc1700.o(i.spi_tran)) +

    [Called By]

    • >>   wr_dat_start +
    • >>   wr_dat_only +
    • >>   wr_dat +
    • >>   wr_cmd +
    • >>   GLCD_Init +
    + +

    spi_tran_man (Thumb, 106 bytes, Stack size 40 bytes, glcd_spi_lpc1700.o(i.spi_tran_man)) +

    [Stack]

    • Max Depth = 40
    • Call Chain = spi_tran_man +
    +
    [Calls]
    • >>   delay +
    +
    [Called By]
    • >>   rd_id_man +
    + +

    wr_cmd (Thumb, 32 bytes, Stack size 16 bytes, glcd_spi_lpc1700.o(i.wr_cmd)) +

    [Stack]

    • Max Depth = 16
    • Call Chain = wr_cmd +
    +
    [Calls]
    • >>   spi_tran +
    +
    [Called By]
    • >>   GLCD_DrawChar +
    • >>   wr_reg +
    • >>   GLCD_Init +
    • >>   GLCD_Clear +
    + +

    wr_dat (Thumb, 32 bytes, Stack size 16 bytes, glcd_spi_lpc1700.o(i.wr_dat)) +

    [Stack]

    • Max Depth = 16
    • Call Chain = wr_dat +
    +
    [Calls]
    • >>   spi_tran +
    +
    [Called By]
    • >>   wr_reg +
    + +

    wr_dat_only (Thumb, 20 bytes, Stack size 8 bytes, glcd_spi_lpc1700.o(i.wr_dat_only)) +

    [Stack]

    • Max Depth = 8
    • Call Chain = wr_dat_only +
    +
    [Calls]
    • >>   spi_tran +
    +
    [Called By]
    • >>   GLCD_DrawChar +
    • >>   GLCD_Clear +
    + +

    wr_dat_start (Thumb, 12 bytes, Stack size 0 bytes, glcd_spi_lpc1700.o(i.wr_dat_start)) +

    [Calls]

    • >>   spi_tran +
    +
    [Called By]
    • >>   GLCD_DrawChar +
    • >>   GLCD_Clear +
    + +

    wr_reg (Thumb, 18 bytes, Stack size 8 bytes, glcd_spi_lpc1700.o(i.wr_reg)) +

    [Stack]

    • Max Depth = 24
    • Call Chain = wr_reg ⇒ wr_dat +
    +
    [Calls]
    • >>   wr_dat +
    • >>   wr_cmd +
    +
    [Called By]
    • >>   GLCD_SetWindow +
    • >>   GLCD_Init +
    +

    +

    +Undefined Global Symbols +

    diff --git a/F2024/coe718/labs/lab2/Objects/bitband.lnp b/F2024/coe718/labs/lab2/Objects/bitband.lnp new file mode 100755 index 0000000..fa72589 --- /dev/null +++ b/F2024/coe718/labs/lab2/Objects/bitband.lnp @@ -0,0 +1,13 @@ +--cpu Cortex-M3 +".\objects\bitband.o" +".\objects\glcd_spi_lpc1700.o" +".\objects\led_mcb1700.o" +".\objects\eventrecorder.o" +".\objects\gpio_lpc17xx.o" +".\objects\pin_lpc17xx.o" +".\objects\startup_lpc17xx.o" +".\objects\system_lpc17xx.o" +--strict --scatter ".\Objects\bitband.sct" +--summary_stderr --info summarysizes --map --load_addr_map_info --xref --callgraph --symbols +--info sizes --info totals --info unused --info veneers +--list ".\Listings\bitband.map" -o .\Objects\bitband.axf \ No newline at end of file diff --git a/F2024/coe718/labs/lab2/Objects/bitband.o b/F2024/coe718/labs/lab2/Objects/bitband.o new file mode 100755 index 0000000..c3b5a2b Binary files /dev/null and b/F2024/coe718/labs/lab2/Objects/bitband.o differ diff --git a/F2024/coe718/labs/lab2/Objects/bitband.sct b/F2024/coe718/labs/lab2/Objects/bitband.sct new file mode 100755 index 0000000..fa7bf97 --- /dev/null +++ b/F2024/coe718/labs/lab2/Objects/bitband.sct @@ -0,0 +1,16 @@ +; ************************************************************* +; *** Scatter-Loading Description File generated by uVision *** +; ************************************************************* + +LR_IROM1 0x00000000 0x00080000 { ; load region size_region + ER_IROM1 0x00000000 0x00080000 { ; load address = execution address + *.o (RESET, +First) + *(InRoot$$Sections) + .ANY (+RO) + .ANY (+XO) + } + RW_IRAM1 0x10000000 0x00008000 { ; RW data + .ANY (+RW +ZI) + } +} + diff --git a/F2024/coe718/labs/lab2/Objects/bitband_Target 1.dep b/F2024/coe718/labs/lab2/Objects/bitband_Target 1.dep new file mode 100755 index 0000000..5cff255 --- /dev/null +++ b/F2024/coe718/labs/lab2/Objects/bitband_Target 1.dep @@ -0,0 +1,88 @@ +Dependencies for Project 'bitband', Target 'Target 1': (DO NOT MODIFY !) +CompilerVersion: 5060750::V5.06 update 6 (build 750)::.\ARMCC +F (.\bitbanding\bitband.c)(0x66F38314)(--c99 --gnu -c --cpu Cortex-M3 -g -O2 --apcs=interwork --split_sections -I.\RTE\Compiler -I.\RTE\Device\LPC1768 -I.\RTE\_Target_1 -IC:\Users\ECBME\AppData\Local\Arm\Packs\ARM\CMSIS\5.7.0\CMSIS\Core\Include -IC:\Users\ECBME\AppData\Local\Arm\Packs\Keil\ARM_Compiler\1.6.3\Include -IC:\Users\ECBME\AppData\Local\Arm\Packs\Keil\LPC1700_DFP\2.6.0\Device\Include -IC:\Users\ECBME\AppData\Local\Arm\Packs\Keil\LPC1700_DFP\2.6.0\RTE_Driver -IC:\Users\ECBME\AppData\Local\Arm\Packs\Keil\MDK-Middleware\7.12.0\Board -D__UVISION_VERSION="531" -D_RTE_ -DLPC175x_6x -D_RTE_ -o .\objects\bitband.o --omf_browse .\objects\bitband.crf --depend .\objects\bitband.d) +I (C:\Users\ECBME\AppData\Local\Arm\Packs\Keil\LPC1700_DFP\2.6.0\Device\Include\LPC17xx.h)(0x584985E2) +I (C:\Users\ECBME\AppData\Local\Arm\Packs\ARM\CMSIS\5.7.0\CMSIS\Core\Include\core_cm3.h)(0x5E8F79E2) +I (C:\Keil_v5\ARM\ARMCC\include\stdint.h)(0x5EC81EBC) +I (C:\Users\ECBME\AppData\Local\Arm\Packs\ARM\CMSIS\5.7.0\CMSIS\Core\Include\cmsis_version.h)(0x5E8F79E2) +I (C:\Users\ECBME\AppData\Local\Arm\Packs\ARM\CMSIS\5.7.0\CMSIS\Core\Include\cmsis_compiler.h)(0x5E83AF82) +I (C:\Users\ECBME\AppData\Local\Arm\Packs\ARM\CMSIS\5.7.0\CMSIS\Core\Include\cmsis_armcc.h)(0x5E8F79E2) +I (C:\Users\ECBME\AppData\Local\Arm\Packs\ARM\CMSIS\5.7.0\CMSIS\Core\Include\mpu_armv7.h)(0x5E8F79E2) +I (C:\Users\ECBME\AppData\Local\Arm\Packs\Keil\LPC1700_DFP\2.6.0\Device\Include\system_LPC17xx.h)(0x584985E2) +I (bitbanding\GLCD.h)(0x631E5620) +I (C:\Keil_v5\ARM\ARMCC\include\stdio.h)(0x5EC81EBC) +F (.\bitbanding\bitband.h)(0x63228B9F)() +F (..\lab1\Boards\Keil\MCB1700\Blinky_ULp\GLCD_SPI_LPC1700.c)(0x631E5620)(--c99 --gnu -c --cpu Cortex-M3 -g -O2 --apcs=interwork --split_sections -I.\RTE\Compiler -I.\RTE\Device\LPC1768 -I.\RTE\_Target_1 -IC:\Users\ECBME\AppData\Local\Arm\Packs\ARM\CMSIS\5.7.0\CMSIS\Core\Include -IC:\Users\ECBME\AppData\Local\Arm\Packs\Keil\ARM_Compiler\1.6.3\Include -IC:\Users\ECBME\AppData\Local\Arm\Packs\Keil\LPC1700_DFP\2.6.0\Device\Include -IC:\Users\ECBME\AppData\Local\Arm\Packs\Keil\LPC1700_DFP\2.6.0\RTE_Driver -IC:\Users\ECBME\AppData\Local\Arm\Packs\Keil\MDK-Middleware\7.12.0\Board -D__UVISION_VERSION="531" -D_RTE_ -DLPC175x_6x -D_RTE_ -o .\objects\glcd_spi_lpc1700.o --omf_browse .\objects\glcd_spi_lpc1700.crf --depend .\objects\glcd_spi_lpc1700.d) +I (C:\Users\ECBME\AppData\Local\Arm\Packs\Keil\LPC1700_DFP\2.6.0\Device\Include\lpc17xx.h)(0x584985E2) +I (C:\Users\ECBME\AppData\Local\Arm\Packs\ARM\CMSIS\5.7.0\CMSIS\Core\Include\core_cm3.h)(0x5E8F79E2) +I (C:\Keil_v5\ARM\ARMCC\include\stdint.h)(0x5EC81EBC) +I (C:\Users\ECBME\AppData\Local\Arm\Packs\ARM\CMSIS\5.7.0\CMSIS\Core\Include\cmsis_version.h)(0x5E8F79E2) +I (C:\Users\ECBME\AppData\Local\Arm\Packs\ARM\CMSIS\5.7.0\CMSIS\Core\Include\cmsis_compiler.h)(0x5E83AF82) +I (C:\Users\ECBME\AppData\Local\Arm\Packs\ARM\CMSIS\5.7.0\CMSIS\Core\Include\cmsis_armcc.h)(0x5E8F79E2) +I (C:\Users\ECBME\AppData\Local\Arm\Packs\ARM\CMSIS\5.7.0\CMSIS\Core\Include\mpu_armv7.h)(0x5E8F79E2) +I (C:\Users\ECBME\AppData\Local\Arm\Packs\Keil\LPC1700_DFP\2.6.0\Device\Include\system_LPC17xx.h)(0x584985E2) +I (..\lab1\Boards\Keil\MCB1700\Blinky_ULp\GLCD.h)(0x631E5620) +I (..\lab1\Boards\Keil\MCB1700\Blinky_ULp\Font_6x8_h.h)(0x631E5620) +I (..\lab1\Boards\Keil\MCB1700\Blinky_ULp\Font_16x24_h.h)(0x631E5620) +F (..\lab1\Boards\Keil\MCB1700\Blinky_ULp\Font_6x8_h.h)(0x631E5620)() +F (..\lab1\Boards\Keil\MCB1700\Blinky_ULp\Font_16x24_h.h)(0x631E5620)() +F (..\lab1\Boards\Keil\MCB1700\Blinky_ULp\GLCD.h)(0x631E5620)() +F (C:\Users\ECBME\AppData\Local\Arm\Packs\Keil\LPC1700_DFP\2.6.0\Boards\Keil\MCB1700\Common\LED_MCB1700.c)(0x5D5C2A1A)(--c99 --gnu -c --cpu Cortex-M3 -g -O2 --apcs=interwork --split_sections -I.\RTE\Compiler -I.\RTE\Device\LPC1768 -I.\RTE\_Target_1 -IC:\Users\ECBME\AppData\Local\Arm\Packs\ARM\CMSIS\5.7.0\CMSIS\Core\Include -IC:\Users\ECBME\AppData\Local\Arm\Packs\Keil\ARM_Compiler\1.6.3\Include -IC:\Users\ECBME\AppData\Local\Arm\Packs\Keil\LPC1700_DFP\2.6.0\Device\Include -IC:\Users\ECBME\AppData\Local\Arm\Packs\Keil\LPC1700_DFP\2.6.0\RTE_Driver -IC:\Users\ECBME\AppData\Local\Arm\Packs\Keil\MDK-Middleware\7.12.0\Board -D__UVISION_VERSION="531" -D_RTE_ -DLPC175x_6x -D_RTE_ -o .\objects\led_mcb1700.o --omf_browse .\objects\led_mcb1700.crf --depend .\objects\led_mcb1700.d) +I (C:\Users\ECBME\AppData\Local\Arm\Packs\Keil\LPC1700_DFP\2.6.0\RTE_Driver\PIN_LPC17xx.h)(0x5D5C2A1A) +I (C:\Keil_v5\ARM\ARMCC\include\stdint.h)(0x5EC81EBC) +I (C:\Keil_v5\ARM\ARMCC\include\stdbool.h)(0x5EC81EB6) +I (C:\Users\ECBME\AppData\Local\Arm\Packs\Keil\LPC1700_DFP\2.6.0\RTE_Driver\GPIO_LPC17xx.h)(0x5D5C2A1A) +I (C:\Users\ECBME\AppData\Local\Arm\Packs\Keil\LPC1700_DFP\2.6.0\Device\Include\LPC17xx.h)(0x584985E2) +I (C:\Users\ECBME\AppData\Local\Arm\Packs\ARM\CMSIS\5.7.0\CMSIS\Core\Include\core_cm3.h)(0x5E8F79E2) +I (C:\Users\ECBME\AppData\Local\Arm\Packs\ARM\CMSIS\5.7.0\CMSIS\Core\Include\cmsis_version.h)(0x5E8F79E2) +I (C:\Users\ECBME\AppData\Local\Arm\Packs\ARM\CMSIS\5.7.0\CMSIS\Core\Include\cmsis_compiler.h)(0x5E83AF82) +I (C:\Users\ECBME\AppData\Local\Arm\Packs\ARM\CMSIS\5.7.0\CMSIS\Core\Include\cmsis_armcc.h)(0x5E8F79E2) +I (C:\Users\ECBME\AppData\Local\Arm\Packs\ARM\CMSIS\5.7.0\CMSIS\Core\Include\mpu_armv7.h)(0x5E8F79E2) +I (C:\Users\ECBME\AppData\Local\Arm\Packs\Keil\LPC1700_DFP\2.6.0\Device\Include\system_LPC17xx.h)(0x584985E2) +I (C:\Users\ECBME\AppData\Local\Arm\Packs\Keil\MDK-Middleware\7.12.0\Board\Board_LED.h)(0x5D14C62A) +F (C:\Users\ECBME\AppData\Local\Arm\Packs\Keil\ARM_Compiler\1.6.3\Source\EventRecorder.c)(0x5B8FF93E)(--c99 --gnu -c --cpu Cortex-M3 -g -O2 --apcs=interwork --split_sections -I.\RTE\Compiler -I.\RTE\Device\LPC1768 -I.\RTE\_Target_1 -IC:\Users\ECBME\AppData\Local\Arm\Packs\ARM\CMSIS\5.7.0\CMSIS\Core\Include -IC:\Users\ECBME\AppData\Local\Arm\Packs\Keil\ARM_Compiler\1.6.3\Include -IC:\Users\ECBME\AppData\Local\Arm\Packs\Keil\LPC1700_DFP\2.6.0\Device\Include -IC:\Users\ECBME\AppData\Local\Arm\Packs\Keil\LPC1700_DFP\2.6.0\RTE_Driver -IC:\Users\ECBME\AppData\Local\Arm\Packs\Keil\MDK-Middleware\7.12.0\Board -D__UVISION_VERSION="531" -D_RTE_ -DLPC175x_6x -D_RTE_ -o .\objects\eventrecorder.o --omf_browse .\objects\eventrecorder.crf --depend .\objects\eventrecorder.d) +I (.\RTE\_Target_1\RTE_Components.h)(0x66F1A4F6) +I (C:\Users\ECBME\AppData\Local\Arm\Packs\Keil\LPC1700_DFP\2.6.0\Device\Include\LPC17xx.h)(0x584985E2) +I (C:\Users\ECBME\AppData\Local\Arm\Packs\ARM\CMSIS\5.7.0\CMSIS\Core\Include\core_cm3.h)(0x5E8F79E2) +I (C:\Keil_v5\ARM\ARMCC\include\stdint.h)(0x5EC81EBC) +I (C:\Users\ECBME\AppData\Local\Arm\Packs\ARM\CMSIS\5.7.0\CMSIS\Core\Include\cmsis_version.h)(0x5E8F79E2) +I (C:\Users\ECBME\AppData\Local\Arm\Packs\ARM\CMSIS\5.7.0\CMSIS\Core\Include\cmsis_compiler.h)(0x5E83AF82) +I (C:\Users\ECBME\AppData\Local\Arm\Packs\ARM\CMSIS\5.7.0\CMSIS\Core\Include\cmsis_armcc.h)(0x5E8F79E2) +I (C:\Users\ECBME\AppData\Local\Arm\Packs\ARM\CMSIS\5.7.0\CMSIS\Core\Include\mpu_armv7.h)(0x5E8F79E2) +I (C:\Users\ECBME\AppData\Local\Arm\Packs\Keil\LPC1700_DFP\2.6.0\Device\Include\system_LPC17xx.h)(0x584985E2) +I (C:\Keil_v5\ARM\ARMCC\include\string.h)(0x5EC81EC4) +I (C:\Users\ECBME\AppData\Local\Arm\Packs\Keil\ARM_Compiler\1.6.3\Include\EventRecorder.h)(0x5B8FF93E) +I (.\RTE\Compiler\EventRecorderConf.h)(0x5E6FD1AC) +F (RTE\Compiler\EventRecorderConf.h)(0x5E6FD1AC)() +F (C:\Users\ECBME\AppData\Local\Arm\Packs\Keil\LPC1700_DFP\2.6.0\RTE_Driver\GPIO_LPC17xx.c)(0x5D5C2A1A)(--c99 --gnu -c --cpu Cortex-M3 -g -O2 --apcs=interwork --split_sections -I.\RTE\Compiler -I.\RTE\Device\LPC1768 -I.\RTE\_Target_1 -IC:\Users\ECBME\AppData\Local\Arm\Packs\ARM\CMSIS\5.7.0\CMSIS\Core\Include -IC:\Users\ECBME\AppData\Local\Arm\Packs\Keil\ARM_Compiler\1.6.3\Include -IC:\Users\ECBME\AppData\Local\Arm\Packs\Keil\LPC1700_DFP\2.6.0\Device\Include -IC:\Users\ECBME\AppData\Local\Arm\Packs\Keil\LPC1700_DFP\2.6.0\RTE_Driver -IC:\Users\ECBME\AppData\Local\Arm\Packs\Keil\MDK-Middleware\7.12.0\Board -D__UVISION_VERSION="531" -D_RTE_ -DLPC175x_6x -D_RTE_ -o .\objects\gpio_lpc17xx.o --omf_browse .\objects\gpio_lpc17xx.crf --depend .\objects\gpio_lpc17xx.d) +I (C:\Users\ECBME\AppData\Local\Arm\Packs\Keil\LPC1700_DFP\2.6.0\RTE_Driver\GPIO_LPC17xx.h)(0x5D5C2A1A) +I (C:\Users\ECBME\AppData\Local\Arm\Packs\Keil\LPC1700_DFP\2.6.0\Device\Include\LPC17xx.h)(0x584985E2) +I (C:\Users\ECBME\AppData\Local\Arm\Packs\ARM\CMSIS\5.7.0\CMSIS\Core\Include\core_cm3.h)(0x5E8F79E2) +I (C:\Keil_v5\ARM\ARMCC\include\stdint.h)(0x5EC81EBC) +I (C:\Users\ECBME\AppData\Local\Arm\Packs\ARM\CMSIS\5.7.0\CMSIS\Core\Include\cmsis_version.h)(0x5E8F79E2) +I (C:\Users\ECBME\AppData\Local\Arm\Packs\ARM\CMSIS\5.7.0\CMSIS\Core\Include\cmsis_compiler.h)(0x5E83AF82) +I (C:\Users\ECBME\AppData\Local\Arm\Packs\ARM\CMSIS\5.7.0\CMSIS\Core\Include\cmsis_armcc.h)(0x5E8F79E2) +I (C:\Users\ECBME\AppData\Local\Arm\Packs\ARM\CMSIS\5.7.0\CMSIS\Core\Include\mpu_armv7.h)(0x5E8F79E2) +I (C:\Users\ECBME\AppData\Local\Arm\Packs\Keil\LPC1700_DFP\2.6.0\Device\Include\system_LPC17xx.h)(0x584985E2) +F (C:\Users\ECBME\AppData\Local\Arm\Packs\Keil\LPC1700_DFP\2.6.0\RTE_Driver\PIN_LPC17xx.c)(0x5D5C2A1A)(--c99 --gnu -c --cpu Cortex-M3 -g -O2 --apcs=interwork --split_sections -I.\RTE\Compiler -I.\RTE\Device\LPC1768 -I.\RTE\_Target_1 -IC:\Users\ECBME\AppData\Local\Arm\Packs\ARM\CMSIS\5.7.0\CMSIS\Core\Include -IC:\Users\ECBME\AppData\Local\Arm\Packs\Keil\ARM_Compiler\1.6.3\Include -IC:\Users\ECBME\AppData\Local\Arm\Packs\Keil\LPC1700_DFP\2.6.0\Device\Include -IC:\Users\ECBME\AppData\Local\Arm\Packs\Keil\LPC1700_DFP\2.6.0\RTE_Driver -IC:\Users\ECBME\AppData\Local\Arm\Packs\Keil\MDK-Middleware\7.12.0\Board -D__UVISION_VERSION="531" -D_RTE_ -DLPC175x_6x -D_RTE_ -o .\objects\pin_lpc17xx.o --omf_browse .\objects\pin_lpc17xx.crf --depend .\objects\pin_lpc17xx.d) +I (C:\Users\ECBME\AppData\Local\Arm\Packs\Keil\LPC1700_DFP\2.6.0\Device\Include\LPC17xx.h)(0x584985E2) +I (C:\Users\ECBME\AppData\Local\Arm\Packs\ARM\CMSIS\5.7.0\CMSIS\Core\Include\core_cm3.h)(0x5E8F79E2) +I (C:\Keil_v5\ARM\ARMCC\include\stdint.h)(0x5EC81EBC) +I (C:\Users\ECBME\AppData\Local\Arm\Packs\ARM\CMSIS\5.7.0\CMSIS\Core\Include\cmsis_version.h)(0x5E8F79E2) +I (C:\Users\ECBME\AppData\Local\Arm\Packs\ARM\CMSIS\5.7.0\CMSIS\Core\Include\cmsis_compiler.h)(0x5E83AF82) +I (C:\Users\ECBME\AppData\Local\Arm\Packs\ARM\CMSIS\5.7.0\CMSIS\Core\Include\cmsis_armcc.h)(0x5E8F79E2) +I (C:\Users\ECBME\AppData\Local\Arm\Packs\ARM\CMSIS\5.7.0\CMSIS\Core\Include\mpu_armv7.h)(0x5E8F79E2) +I (C:\Users\ECBME\AppData\Local\Arm\Packs\Keil\LPC1700_DFP\2.6.0\Device\Include\system_LPC17xx.h)(0x584985E2) +I (C:\Users\ECBME\AppData\Local\Arm\Packs\Keil\LPC1700_DFP\2.6.0\RTE_Driver\PIN_LPC17xx.h)(0x5D5C2A1A) +I (C:\Keil_v5\ARM\ARMCC\include\stdbool.h)(0x5EC81EB6) +F (RTE\Device\LPC1768\RTE_Device.h)(0x5D5C2A1A)() +F (RTE\Device\LPC1768\startup_LPC17xx.s)(0x584985E2)(--cpu Cortex-M3 -g --apcs=interwork -I.\RTE\Compiler -I.\RTE\Device\LPC1768 -I.\RTE\_Target_1 -IC:\Users\ECBME\AppData\Local\Arm\Packs\ARM\CMSIS\5.7.0\CMSIS\Core\Include -IC:\Users\ECBME\AppData\Local\Arm\Packs\Keil\ARM_Compiler\1.6.3\Include -IC:\Users\ECBME\AppData\Local\Arm\Packs\Keil\LPC1700_DFP\2.6.0\Device\Include -IC:\Users\ECBME\AppData\Local\Arm\Packs\Keil\LPC1700_DFP\2.6.0\RTE_Driver -IC:\Users\ECBME\AppData\Local\Arm\Packs\Keil\MDK-Middleware\7.12.0\Board --pd "__UVISION_VERSION SETA 531" --pd "_RTE_ SETA 1" --pd "LPC175x_6x SETA 1" --pd "_RTE_ SETA 1" --list .\listings\startup_lpc17xx.lst --xref -o .\objects\startup_lpc17xx.o --depend .\objects\startup_lpc17xx.d) +F (RTE\Device\LPC1768\system_LPC17xx.c)(0x584985E2)(--c99 --gnu -c --cpu Cortex-M3 -g -O2 --apcs=interwork --split_sections -I.\RTE\Compiler -I.\RTE\Device\LPC1768 -I.\RTE\_Target_1 -IC:\Users\ECBME\AppData\Local\Arm\Packs\ARM\CMSIS\5.7.0\CMSIS\Core\Include -IC:\Users\ECBME\AppData\Local\Arm\Packs\Keil\ARM_Compiler\1.6.3\Include -IC:\Users\ECBME\AppData\Local\Arm\Packs\Keil\LPC1700_DFP\2.6.0\Device\Include -IC:\Users\ECBME\AppData\Local\Arm\Packs\Keil\LPC1700_DFP\2.6.0\RTE_Driver -IC:\Users\ECBME\AppData\Local\Arm\Packs\Keil\MDK-Middleware\7.12.0\Board -D__UVISION_VERSION="531" -D_RTE_ -DLPC175x_6x -D_RTE_ -o .\objects\system_lpc17xx.o --omf_browse .\objects\system_lpc17xx.crf --depend .\objects\system_lpc17xx.d) +I (C:\Keil_v5\ARM\ARMCC\include\stdint.h)(0x5EC81EBC) +I (C:\Users\ECBME\AppData\Local\Arm\Packs\Keil\LPC1700_DFP\2.6.0\Device\Include\LPC17xx.h)(0x584985E2) +I (C:\Users\ECBME\AppData\Local\Arm\Packs\ARM\CMSIS\5.7.0\CMSIS\Core\Include\core_cm3.h)(0x5E8F79E2) +I (C:\Users\ECBME\AppData\Local\Arm\Packs\ARM\CMSIS\5.7.0\CMSIS\Core\Include\cmsis_version.h)(0x5E8F79E2) +I (C:\Users\ECBME\AppData\Local\Arm\Packs\ARM\CMSIS\5.7.0\CMSIS\Core\Include\cmsis_compiler.h)(0x5E83AF82) +I (C:\Users\ECBME\AppData\Local\Arm\Packs\ARM\CMSIS\5.7.0\CMSIS\Core\Include\cmsis_armcc.h)(0x5E8F79E2) +I (C:\Users\ECBME\AppData\Local\Arm\Packs\ARM\CMSIS\5.7.0\CMSIS\Core\Include\mpu_armv7.h)(0x5E8F79E2) +I (C:\Users\ECBME\AppData\Local\Arm\Packs\Keil\LPC1700_DFP\2.6.0\Device\Include\system_LPC17xx.h)(0x584985E2) diff --git a/F2024/coe718/labs/lab2/Objects/eventrecorder.crf b/F2024/coe718/labs/lab2/Objects/eventrecorder.crf new file mode 100755 index 0000000..9fddc5f Binary files /dev/null and b/F2024/coe718/labs/lab2/Objects/eventrecorder.crf differ diff --git a/F2024/coe718/labs/lab2/Objects/eventrecorder.d b/F2024/coe718/labs/lab2/Objects/eventrecorder.d new file mode 100755 index 0000000..4c72435 --- /dev/null +++ b/F2024/coe718/labs/lab2/Objects/eventrecorder.d @@ -0,0 +1,13 @@ +.\objects\eventrecorder.o: C:\Users\ECBME\AppData\Local\Arm\Packs\Keil\ARM_Compiler\1.6.3\Source\EventRecorder.c +.\objects\eventrecorder.o: .\RTE\_Target_1\RTE_Components.h +.\objects\eventrecorder.o: C:\Users\ECBME\AppData\Local\Arm\Packs\Keil\LPC1700_DFP\2.6.0\Device\Include\LPC17xx.h +.\objects\eventrecorder.o: C:\Users\ECBME\AppData\Local\Arm\Packs\ARM\CMSIS\5.7.0\CMSIS\Core\Include\core_cm3.h +.\objects\eventrecorder.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\stdint.h +.\objects\eventrecorder.o: C:\Users\ECBME\AppData\Local\Arm\Packs\ARM\CMSIS\5.7.0\CMSIS\Core\Include\cmsis_version.h +.\objects\eventrecorder.o: C:\Users\ECBME\AppData\Local\Arm\Packs\ARM\CMSIS\5.7.0\CMSIS\Core\Include\cmsis_compiler.h +.\objects\eventrecorder.o: C:\Users\ECBME\AppData\Local\Arm\Packs\ARM\CMSIS\5.7.0\CMSIS\Core\Include\cmsis_armcc.h +.\objects\eventrecorder.o: C:\Users\ECBME\AppData\Local\Arm\Packs\ARM\CMSIS\5.7.0\CMSIS\Core\Include\mpu_armv7.h +.\objects\eventrecorder.o: C:\Users\ECBME\AppData\Local\Arm\Packs\Keil\LPC1700_DFP\2.6.0\Device\Include\system_LPC17xx.h +.\objects\eventrecorder.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\string.h +.\objects\eventrecorder.o: C:\Users\ECBME\AppData\Local\Arm\Packs\Keil\ARM_Compiler\1.6.3\Include\EventRecorder.h +.\objects\eventrecorder.o: .\RTE\Compiler\EventRecorderConf.h diff --git a/F2024/coe718/labs/lab2/Objects/eventrecorder.o b/F2024/coe718/labs/lab2/Objects/eventrecorder.o new file mode 100755 index 0000000..d0e0d36 Binary files /dev/null and b/F2024/coe718/labs/lab2/Objects/eventrecorder.o differ diff --git a/F2024/coe718/labs/lab2/Objects/glcd_spi_lpc1700.crf b/F2024/coe718/labs/lab2/Objects/glcd_spi_lpc1700.crf new file mode 100755 index 0000000..37bc3fc Binary files /dev/null and b/F2024/coe718/labs/lab2/Objects/glcd_spi_lpc1700.crf differ diff --git a/F2024/coe718/labs/lab2/Objects/glcd_spi_lpc1700.d b/F2024/coe718/labs/lab2/Objects/glcd_spi_lpc1700.d new file mode 100755 index 0000000..bfe5a2e --- /dev/null +++ b/F2024/coe718/labs/lab2/Objects/glcd_spi_lpc1700.d @@ -0,0 +1,12 @@ +.\objects\glcd_spi_lpc1700.o: ..\lab1\Boards\Keil\MCB1700\Blinky_ULp\GLCD_SPI_LPC1700.c +.\objects\glcd_spi_lpc1700.o: C:\Users\ECBME\AppData\Local\Arm\Packs\Keil\LPC1700_DFP\2.6.0\Device\Include\lpc17xx.h +.\objects\glcd_spi_lpc1700.o: C:\Users\ECBME\AppData\Local\Arm\Packs\ARM\CMSIS\5.7.0\CMSIS\Core\Include\core_cm3.h +.\objects\glcd_spi_lpc1700.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\stdint.h +.\objects\glcd_spi_lpc1700.o: C:\Users\ECBME\AppData\Local\Arm\Packs\ARM\CMSIS\5.7.0\CMSIS\Core\Include\cmsis_version.h +.\objects\glcd_spi_lpc1700.o: C:\Users\ECBME\AppData\Local\Arm\Packs\ARM\CMSIS\5.7.0\CMSIS\Core\Include\cmsis_compiler.h +.\objects\glcd_spi_lpc1700.o: C:\Users\ECBME\AppData\Local\Arm\Packs\ARM\CMSIS\5.7.0\CMSIS\Core\Include\cmsis_armcc.h +.\objects\glcd_spi_lpc1700.o: C:\Users\ECBME\AppData\Local\Arm\Packs\ARM\CMSIS\5.7.0\CMSIS\Core\Include\mpu_armv7.h +.\objects\glcd_spi_lpc1700.o: C:\Users\ECBME\AppData\Local\Arm\Packs\Keil\LPC1700_DFP\2.6.0\Device\Include\system_LPC17xx.h +.\objects\glcd_spi_lpc1700.o: ..\lab1\Boards\Keil\MCB1700\Blinky_ULp\GLCD.h +.\objects\glcd_spi_lpc1700.o: ..\lab1\Boards\Keil\MCB1700\Blinky_ULp\Font_6x8_h.h +.\objects\glcd_spi_lpc1700.o: ..\lab1\Boards\Keil\MCB1700\Blinky_ULp\Font_16x24_h.h diff --git a/F2024/coe718/labs/lab2/Objects/glcd_spi_lpc1700.o b/F2024/coe718/labs/lab2/Objects/glcd_spi_lpc1700.o new file mode 100755 index 0000000..5ed1d8f Binary files /dev/null and b/F2024/coe718/labs/lab2/Objects/glcd_spi_lpc1700.o differ diff --git a/F2024/coe718/labs/lab2/Objects/gpio_lpc17xx.crf b/F2024/coe718/labs/lab2/Objects/gpio_lpc17xx.crf new file mode 100755 index 0000000..90eb383 Binary files /dev/null and b/F2024/coe718/labs/lab2/Objects/gpio_lpc17xx.crf differ diff --git a/F2024/coe718/labs/lab2/Objects/gpio_lpc17xx.d b/F2024/coe718/labs/lab2/Objects/gpio_lpc17xx.d new file mode 100755 index 0000000..e52ee7d --- /dev/null +++ b/F2024/coe718/labs/lab2/Objects/gpio_lpc17xx.d @@ -0,0 +1,10 @@ +.\objects\gpio_lpc17xx.o: C:\Users\ECBME\AppData\Local\Arm\Packs\Keil\LPC1700_DFP\2.6.0\RTE_Driver\GPIO_LPC17xx.c +.\objects\gpio_lpc17xx.o: C:\Users\ECBME\AppData\Local\Arm\Packs\Keil\LPC1700_DFP\2.6.0\RTE_Driver\GPIO_LPC17xx.h +.\objects\gpio_lpc17xx.o: C:\Users\ECBME\AppData\Local\Arm\Packs\Keil\LPC1700_DFP\2.6.0\Device\Include\LPC17xx.h +.\objects\gpio_lpc17xx.o: C:\Users\ECBME\AppData\Local\Arm\Packs\ARM\CMSIS\5.7.0\CMSIS\Core\Include\core_cm3.h +.\objects\gpio_lpc17xx.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\stdint.h +.\objects\gpio_lpc17xx.o: C:\Users\ECBME\AppData\Local\Arm\Packs\ARM\CMSIS\5.7.0\CMSIS\Core\Include\cmsis_version.h +.\objects\gpio_lpc17xx.o: C:\Users\ECBME\AppData\Local\Arm\Packs\ARM\CMSIS\5.7.0\CMSIS\Core\Include\cmsis_compiler.h +.\objects\gpio_lpc17xx.o: C:\Users\ECBME\AppData\Local\Arm\Packs\ARM\CMSIS\5.7.0\CMSIS\Core\Include\cmsis_armcc.h +.\objects\gpio_lpc17xx.o: C:\Users\ECBME\AppData\Local\Arm\Packs\ARM\CMSIS\5.7.0\CMSIS\Core\Include\mpu_armv7.h +.\objects\gpio_lpc17xx.o: C:\Users\ECBME\AppData\Local\Arm\Packs\Keil\LPC1700_DFP\2.6.0\Device\Include\system_LPC17xx.h diff --git a/F2024/coe718/labs/lab2/Objects/gpio_lpc17xx.o b/F2024/coe718/labs/lab2/Objects/gpio_lpc17xx.o new file mode 100755 index 0000000..3e3e676 Binary files /dev/null and b/F2024/coe718/labs/lab2/Objects/gpio_lpc17xx.o differ diff --git a/F2024/coe718/labs/lab2/Objects/irq.crf b/F2024/coe718/labs/lab2/Objects/irq.crf new file mode 100755 index 0000000..97be2f8 Binary files /dev/null and b/F2024/coe718/labs/lab2/Objects/irq.crf differ diff --git a/F2024/coe718/labs/lab2/Objects/irq.d b/F2024/coe718/labs/lab2/Objects/irq.d new file mode 100755 index 0000000..8fd3041 --- /dev/null +++ b/F2024/coe718/labs/lab2/Objects/irq.d @@ -0,0 +1,12 @@ +.\objects\irq.o: ..\lab1\Boards\Keil\MCB1700\Blinky_ULp\IRQ.c +.\objects\irq.o: C:\Users\ECBME\AppData\Local\Arm\Packs\Keil\LPC1700_DFP\2.6.0\Device\Include\LPC17xx.h +.\objects\irq.o: C:\Users\ECBME\AppData\Local\Arm\Packs\ARM\CMSIS\5.7.0\CMSIS\Core\Include\core_cm3.h +.\objects\irq.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\stdint.h +.\objects\irq.o: C:\Users\ECBME\AppData\Local\Arm\Packs\ARM\CMSIS\5.7.0\CMSIS\Core\Include\cmsis_version.h +.\objects\irq.o: C:\Users\ECBME\AppData\Local\Arm\Packs\ARM\CMSIS\5.7.0\CMSIS\Core\Include\cmsis_compiler.h +.\objects\irq.o: C:\Users\ECBME\AppData\Local\Arm\Packs\ARM\CMSIS\5.7.0\CMSIS\Core\Include\cmsis_armcc.h +.\objects\irq.o: C:\Users\ECBME\AppData\Local\Arm\Packs\ARM\CMSIS\5.7.0\CMSIS\Core\Include\mpu_armv7.h +.\objects\irq.o: C:\Users\ECBME\AppData\Local\Arm\Packs\Keil\LPC1700_DFP\2.6.0\Device\Include\system_LPC17xx.h +.\objects\irq.o: ..\lab1\Boards\Keil\MCB1700\Blinky_ULp\LED.h +.\objects\irq.o: C:\Users\ECBME\AppData\Local\Arm\Packs\Keil\MDK-Middleware\7.12.0\Board\Board_ADC.h +.\objects\irq.o: ..\lab1\Boards\Keil\MCB1700\Blinky_ULp\Blinky.h diff --git a/F2024/coe718/labs/lab2/Objects/irq.o b/F2024/coe718/labs/lab2/Objects/irq.o new file mode 100755 index 0000000..16ec22d Binary files /dev/null and b/F2024/coe718/labs/lab2/Objects/irq.o differ diff --git a/F2024/coe718/labs/lab2/Objects/led.crf b/F2024/coe718/labs/lab2/Objects/led.crf new file mode 100755 index 0000000..3a2e4e4 Binary files /dev/null and b/F2024/coe718/labs/lab2/Objects/led.crf differ diff --git a/F2024/coe718/labs/lab2/Objects/led.d b/F2024/coe718/labs/lab2/Objects/led.d new file mode 100755 index 0000000..f367e3b --- /dev/null +++ b/F2024/coe718/labs/lab2/Objects/led.d @@ -0,0 +1,10 @@ +.\objects\led.o: ..\lab1\Boards\Keil\MCB1700\Blinky_ULp\LED.c +.\objects\led.o: C:\Users\ECBME\AppData\Local\Arm\Packs\Keil\LPC1700_DFP\2.6.0\Device\Include\LPC17xx.h +.\objects\led.o: C:\Users\ECBME\AppData\Local\Arm\Packs\ARM\CMSIS\5.7.0\CMSIS\Core\Include\core_cm3.h +.\objects\led.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\stdint.h +.\objects\led.o: C:\Users\ECBME\AppData\Local\Arm\Packs\ARM\CMSIS\5.7.0\CMSIS\Core\Include\cmsis_version.h +.\objects\led.o: C:\Users\ECBME\AppData\Local\Arm\Packs\ARM\CMSIS\5.7.0\CMSIS\Core\Include\cmsis_compiler.h +.\objects\led.o: C:\Users\ECBME\AppData\Local\Arm\Packs\ARM\CMSIS\5.7.0\CMSIS\Core\Include\cmsis_armcc.h +.\objects\led.o: C:\Users\ECBME\AppData\Local\Arm\Packs\ARM\CMSIS\5.7.0\CMSIS\Core\Include\mpu_armv7.h +.\objects\led.o: C:\Users\ECBME\AppData\Local\Arm\Packs\Keil\LPC1700_DFP\2.6.0\Device\Include\system_LPC17xx.h +.\objects\led.o: ..\lab1\Boards\Keil\MCB1700\Blinky_ULp\LED.h diff --git a/F2024/coe718/labs/lab2/Objects/led.o b/F2024/coe718/labs/lab2/Objects/led.o new file mode 100755 index 0000000..9ddb926 Binary files /dev/null and b/F2024/coe718/labs/lab2/Objects/led.o differ diff --git a/F2024/coe718/labs/lab2/Objects/led_mcb1700.crf b/F2024/coe718/labs/lab2/Objects/led_mcb1700.crf new file mode 100755 index 0000000..e5239ff Binary files /dev/null and b/F2024/coe718/labs/lab2/Objects/led_mcb1700.crf differ diff --git a/F2024/coe718/labs/lab2/Objects/led_mcb1700.d b/F2024/coe718/labs/lab2/Objects/led_mcb1700.d new file mode 100755 index 0000000..13372d8 --- /dev/null +++ b/F2024/coe718/labs/lab2/Objects/led_mcb1700.d @@ -0,0 +1,13 @@ +.\objects\led_mcb1700.o: C:\Users\ECBME\AppData\Local\Arm\Packs\Keil\LPC1700_DFP\2.6.0\Boards\Keil\MCB1700\Common\LED_MCB1700.c +.\objects\led_mcb1700.o: C:\Users\ECBME\AppData\Local\Arm\Packs\Keil\LPC1700_DFP\2.6.0\RTE_Driver\PIN_LPC17xx.h +.\objects\led_mcb1700.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\stdint.h +.\objects\led_mcb1700.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\stdbool.h +.\objects\led_mcb1700.o: C:\Users\ECBME\AppData\Local\Arm\Packs\Keil\LPC1700_DFP\2.6.0\RTE_Driver\GPIO_LPC17xx.h +.\objects\led_mcb1700.o: C:\Users\ECBME\AppData\Local\Arm\Packs\Keil\LPC1700_DFP\2.6.0\Device\Include\LPC17xx.h +.\objects\led_mcb1700.o: C:\Users\ECBME\AppData\Local\Arm\Packs\ARM\CMSIS\5.7.0\CMSIS\Core\Include\core_cm3.h +.\objects\led_mcb1700.o: C:\Users\ECBME\AppData\Local\Arm\Packs\ARM\CMSIS\5.7.0\CMSIS\Core\Include\cmsis_version.h +.\objects\led_mcb1700.o: C:\Users\ECBME\AppData\Local\Arm\Packs\ARM\CMSIS\5.7.0\CMSIS\Core\Include\cmsis_compiler.h +.\objects\led_mcb1700.o: C:\Users\ECBME\AppData\Local\Arm\Packs\ARM\CMSIS\5.7.0\CMSIS\Core\Include\cmsis_armcc.h +.\objects\led_mcb1700.o: C:\Users\ECBME\AppData\Local\Arm\Packs\ARM\CMSIS\5.7.0\CMSIS\Core\Include\mpu_armv7.h +.\objects\led_mcb1700.o: C:\Users\ECBME\AppData\Local\Arm\Packs\Keil\LPC1700_DFP\2.6.0\Device\Include\system_LPC17xx.h +.\objects\led_mcb1700.o: C:\Users\ECBME\AppData\Local\Arm\Packs\Keil\MDK-Middleware\7.12.0\Board\Board_LED.h diff --git a/F2024/coe718/labs/lab2/Objects/led_mcb1700.o b/F2024/coe718/labs/lab2/Objects/led_mcb1700.o new file mode 100755 index 0000000..bb836fa Binary files /dev/null and b/F2024/coe718/labs/lab2/Objects/led_mcb1700.o differ diff --git a/F2024/coe718/labs/lab2/Objects/pin_lpc17xx.crf b/F2024/coe718/labs/lab2/Objects/pin_lpc17xx.crf new file mode 100755 index 0000000..873715f Binary files /dev/null and b/F2024/coe718/labs/lab2/Objects/pin_lpc17xx.crf differ diff --git a/F2024/coe718/labs/lab2/Objects/pin_lpc17xx.d b/F2024/coe718/labs/lab2/Objects/pin_lpc17xx.d new file mode 100755 index 0000000..4dcefe7 --- /dev/null +++ b/F2024/coe718/labs/lab2/Objects/pin_lpc17xx.d @@ -0,0 +1,11 @@ +.\objects\pin_lpc17xx.o: C:\Users\ECBME\AppData\Local\Arm\Packs\Keil\LPC1700_DFP\2.6.0\RTE_Driver\PIN_LPC17xx.c +.\objects\pin_lpc17xx.o: C:\Users\ECBME\AppData\Local\Arm\Packs\Keil\LPC1700_DFP\2.6.0\Device\Include\LPC17xx.h +.\objects\pin_lpc17xx.o: C:\Users\ECBME\AppData\Local\Arm\Packs\ARM\CMSIS\5.7.0\CMSIS\Core\Include\core_cm3.h +.\objects\pin_lpc17xx.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\stdint.h +.\objects\pin_lpc17xx.o: C:\Users\ECBME\AppData\Local\Arm\Packs\ARM\CMSIS\5.7.0\CMSIS\Core\Include\cmsis_version.h +.\objects\pin_lpc17xx.o: C:\Users\ECBME\AppData\Local\Arm\Packs\ARM\CMSIS\5.7.0\CMSIS\Core\Include\cmsis_compiler.h +.\objects\pin_lpc17xx.o: C:\Users\ECBME\AppData\Local\Arm\Packs\ARM\CMSIS\5.7.0\CMSIS\Core\Include\cmsis_armcc.h +.\objects\pin_lpc17xx.o: C:\Users\ECBME\AppData\Local\Arm\Packs\ARM\CMSIS\5.7.0\CMSIS\Core\Include\mpu_armv7.h +.\objects\pin_lpc17xx.o: C:\Users\ECBME\AppData\Local\Arm\Packs\Keil\LPC1700_DFP\2.6.0\Device\Include\system_LPC17xx.h +.\objects\pin_lpc17xx.o: C:\Users\ECBME\AppData\Local\Arm\Packs\Keil\LPC1700_DFP\2.6.0\RTE_Driver\PIN_LPC17xx.h +.\objects\pin_lpc17xx.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\stdbool.h diff --git a/F2024/coe718/labs/lab2/Objects/pin_lpc17xx.o b/F2024/coe718/labs/lab2/Objects/pin_lpc17xx.o new file mode 100755 index 0000000..9a20bf4 Binary files /dev/null and b/F2024/coe718/labs/lab2/Objects/pin_lpc17xx.o differ diff --git a/F2024/coe718/labs/lab2/Objects/startup_lpc17xx.d b/F2024/coe718/labs/lab2/Objects/startup_lpc17xx.d new file mode 100755 index 0000000..23d67c6 --- /dev/null +++ b/F2024/coe718/labs/lab2/Objects/startup_lpc17xx.d @@ -0,0 +1 @@ +.\objects\startup_lpc17xx.o: RTE\Device\LPC1768\startup_LPC17xx.s diff --git a/F2024/coe718/labs/lab2/Objects/startup_lpc17xx.o b/F2024/coe718/labs/lab2/Objects/startup_lpc17xx.o new file mode 100755 index 0000000..2c8bd68 Binary files /dev/null and b/F2024/coe718/labs/lab2/Objects/startup_lpc17xx.o differ diff --git a/F2024/coe718/labs/lab2/Objects/system_lpc17xx.crf b/F2024/coe718/labs/lab2/Objects/system_lpc17xx.crf new file mode 100755 index 0000000..f7d385f Binary files /dev/null and b/F2024/coe718/labs/lab2/Objects/system_lpc17xx.crf differ diff --git a/F2024/coe718/labs/lab2/Objects/system_lpc17xx.d b/F2024/coe718/labs/lab2/Objects/system_lpc17xx.d new file mode 100755 index 0000000..d0a781c --- /dev/null +++ b/F2024/coe718/labs/lab2/Objects/system_lpc17xx.d @@ -0,0 +1,9 @@ +.\objects\system_lpc17xx.o: RTE\Device\LPC1768\system_LPC17xx.c +.\objects\system_lpc17xx.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\stdint.h +.\objects\system_lpc17xx.o: C:\Users\ECBME\AppData\Local\Arm\Packs\Keil\LPC1700_DFP\2.6.0\Device\Include\LPC17xx.h +.\objects\system_lpc17xx.o: C:\Users\ECBME\AppData\Local\Arm\Packs\ARM\CMSIS\5.7.0\CMSIS\Core\Include\core_cm3.h +.\objects\system_lpc17xx.o: C:\Users\ECBME\AppData\Local\Arm\Packs\ARM\CMSIS\5.7.0\CMSIS\Core\Include\cmsis_version.h +.\objects\system_lpc17xx.o: C:\Users\ECBME\AppData\Local\Arm\Packs\ARM\CMSIS\5.7.0\CMSIS\Core\Include\cmsis_compiler.h +.\objects\system_lpc17xx.o: C:\Users\ECBME\AppData\Local\Arm\Packs\ARM\CMSIS\5.7.0\CMSIS\Core\Include\cmsis_armcc.h +.\objects\system_lpc17xx.o: C:\Users\ECBME\AppData\Local\Arm\Packs\ARM\CMSIS\5.7.0\CMSIS\Core\Include\mpu_armv7.h +.\objects\system_lpc17xx.o: C:\Users\ECBME\AppData\Local\Arm\Packs\Keil\LPC1700_DFP\2.6.0\Device\Include\system_LPC17xx.h diff --git a/F2024/coe718/labs/lab2/Objects/system_lpc17xx.o b/F2024/coe718/labs/lab2/Objects/system_lpc17xx.o new file mode 100755 index 0000000..850cb3a Binary files /dev/null and b/F2024/coe718/labs/lab2/Objects/system_lpc17xx.o differ diff --git a/F2024/coe718/labs/lab2/RTE/Compiler/EventRecorderConf.h b/F2024/coe718/labs/lab2/RTE/Compiler/EventRecorderConf.h new file mode 100755 index 0000000..5cc4c74 --- /dev/null +++ b/F2024/coe718/labs/lab2/RTE/Compiler/EventRecorderConf.h @@ -0,0 +1,34 @@ +/*------------------------------------------------------------------------------ + * MDK - Component ::Event Recorder + * Copyright (c) 2016-2018 ARM Germany GmbH. All rights reserved. + *------------------------------------------------------------------------------ + * Name: EventRecorderConf.h + * Purpose: Event Recorder Configuration + * Rev.: V1.1.0 + *----------------------------------------------------------------------------*/ + +//-------- <<< Use Configuration Wizard in Context Menu >>> -------------------- + +// Event Recorder + +// Number of Records +// <8=>8 <16=>16 <32=>32 <64=>64 <128=>128 <256=>256 <512=>512 <1024=>1024 +// <2048=>2048 <4096=>4096 <8192=>8192 <16384=>16384 <32768=>32768 +// <65536=>65536 +// Configures size of Event Record Buffer (each record is 16 bytes) +// Must be 2^n (min=8, max=65536) +#define EVENT_RECORD_COUNT 64U + +// Time Stamp Source +// <0=> DWT Cycle Counter <1=> SysTick <2=> CMSIS-RTOS2 System Timer +// <3=> User Timer (Normal Reset) <4=> User Timer (Power-On Reset) +// Selects source for 32-bit time stamp +#define EVENT_TIMESTAMP_SOURCE 0 + +// Time Stamp Clock Frequency [Hz] <0-1000000000> +// Defines initial time stamp clock frequency (0 when not used) +#define EVENT_TIMESTAMP_FREQ 0U + +// + +//------------- <<< end of configuration section >>> --------------------------- diff --git a/F2024/coe718/labs/lab2/RTE/Device/LPC1768/RTE_Device.h b/F2024/coe718/labs/lab2/RTE/Device/LPC1768/RTE_Device.h new file mode 100755 index 0000000..81024f2 --- /dev/null +++ b/F2024/coe718/labs/lab2/RTE/Device/LPC1768/RTE_Device.h @@ -0,0 +1,1166 @@ +/* -------------------------------------------------------------------------- + * Copyright (c) 2013-2016 Arm Limited (or its affiliates). All + * rights reserved. + * + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the License); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an AS IS BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + * $Date: 20. April 2016 + * $Revision: V2.4.1 + * + * Project: RTE Device Configuration for NXP LPC17xx + * -------------------------------------------------------------------------- */ + +//-------- <<< Use Configuration Wizard in Context Menu >>> -------------------- + +#ifndef __RTE_DEVICE_H +#define __RTE_DEVICE_H + + +// USB Controller [Driver_USBD and Driver_USBH] +// Configuration settings for Driver_USBD in component ::Drivers:USB Device +// Configuration settings for Driver_USBH in component ::Drivers:USB Host +#define RTE_USB_USB0 0 + +// Pin Configuration +// USB_PPWR (Host) <0=>Not used <1=>P1_19 +// VBUS drive signal (towards external charge pump or power management unit). +#define RTE_USB_PPWR_ID 1 +#if (RTE_USB_PPWR_ID == 0) + #define RTE_USB_PPWR_PIN_EN 0 +#elif (RTE_USB_PPWR_ID == 1) + #define RTE_USB_PPWR_PIN_EN 1 +#else + #error "Invalid RTE_USB_PPWR Pin Configuration!" +#endif + +// USB_PWRD (Host) <0=>Not used <1=>P1_22 +// Power Status for USB port. +#define RTE_USB_PWRD_ID 1 +#if (RTE_USB_PWRD_ID == 0) + #define RTE_USB_PWRD_PIN_EN 0 +#elif (RTE_USB_PWRD_ID == 1) + #define RTE_USB_PWRD_PIN_EN 1 +#else + #error "Invalid RTE_USB_PWRD Pin Configuration!" +#endif + +// USB_OVRCR (Host) <0=>Not used <1=>P1_27 +// Port power fault signal indicating overcurrent condition. +// This signal monitors over-current on the USB bus +// (external circuitry required to detect over-current condition). +#define RTE_USB_OVRCR_ID 0 +#if (RTE_USB_OVRCR_ID == 0) + #define RTE_USB_OVRCR_PIN_EN 0 +#elif (RTE_USB_OVRCR_ID == 1) + #define RTE_USB_OVRCR_PIN_EN 1 +#else + #error "Invalid RTE_USB_OVRCR Pin Configuration!" +#endif + +// USB_CONNECT (Device) <0=>Not used <1=>P2_9 +// SoftConnect control signal +#define RTE_USB_CONNECT_ID 1 +#if (RTE_USB_CONNECT_ID == 0) + #define RTE_USB_CONNECT_PIN_EN 0 +#elif (RTE_USB_CONNECT_ID == 1) + #define RTE_USB_CONNECT_PIN_EN 1 +#else + #error "Invalid RTE_USB_CONNECT Pin Configuration!" +#endif + +// USB_VBUS (Device) <0=>Not used <1=>P1_30 +// VBUS status input. +// When this function is not enabled via its corresponding PINSEL register, it is driven HIGH internally. +#define RTE_USB_VBUS_ID 1 +#if (RTE_USB_VBUS_ID == 0) + #define RTE_USB_VBUS_PIN_EN 0 +#elif (RTE_USB_VBUS_ID == 1) + #define RTE_USB_VBUS_PIN_EN 1 +#else + #error "Invalid RTE_USB_VBUS Pin Configuration!" +#endif + +// USB_UP_LED <0=>Not used <1=>P1_18 +// GoodLink LED control signal. +#define RTE_USB_UP_LED_ID 1 +#if (RTE_USB_UP_LED_ID == 0) + #define RTE_USB_UP_LED_PIN_EN 0 +#elif (RTE_USB_UP_LED_ID == 1) + #define RTE_USB_UP_LED_PIN_EN 1 +#else + #error "Invalid RTE_USB_UP_LED Pin Configuration!" +#endif + +// Pin Configuration +// USB Controller [Driver_USBD and Driver_USBH] + + +// ENET (Ethernet Interface) [Driver_ETH_MAC0] +// Configuration settings for Driver_ETH_MAC0 in component ::Drivers:Ethernet MAC +#define RTE_ENET 0 + + +// RMII (Reduced Media Independent Interface) +#define RTE_ENET_RMII 1 + +// ENET_TXD0 Pin <0=>P1_0 +#define RTE_ENET_RMII_TXD0_PORT_ID 0 +#if (RTE_ENET_RMII_TXD0_PORT_ID == 0) +#define RTE_ENET_RMII_TXD0_PORT 1 +#define RTE_ENET_RMII_TXD0_PIN 0 +#define RTE_ENET_RMII_TXD0_FUNC 1 +#else +#error "Invalid ENET_TXD0 Pin Configuration!" +#endif +// ENET_TXD1 Pin <0=>P1_1 +#define RTE_ENET_RMII_TXD1_PORT_ID 0 +#if (RTE_ENET_RMII_TXD1_PORT_ID == 0) +#define RTE_ENET_RMII_TXD1_PORT 1 +#define RTE_ENET_RMII_TXD1_PIN 1 +#define RTE_ENET_RMII_TXD1_FUNC 1 +#else +#error "Invalid ENET_TXD1 Pin Configuration!" +#endif +// ENET_REF_CLK Pin <0=>P1_15 +#define RTE_ENET_RMII_REF_CLK_PORT_ID 0 +#if (RTE_ENET_RMII_REF_CLK_PORT_ID == 0) +#define RTE_ENET_RMII_REF_CLK_PORT 1 +#define RTE_ENET_RMII_REF_CLK_PIN 15 +#define RTE_ENET_RMII_REF_CLK_FUNC 1 +#else +#error "Invalid ENET_REF_CLK Pin Configuration!" +#endif +// ENET_TX_EN Pin <0=>P1_4 +#define RTE_ENET_RMII_TX_EN_PORT_ID 0 +#if (RTE_ENET_RMII_TX_EN_PORT_ID == 0) +#define RTE_ENET_RMII_TX_EN_PORT 1 +#define RTE_ENET_RMII_TX_EN_PIN 4 +#define RTE_ENET_RMII_TX_EN_FUNC 1 +#else +#error "Invalid ENET_TX_EN Pin Configuration!" +#endif +// ENET_CRS Pin <0=>P1_8 +#define RTE_ENET_RMII_CRS_PORT_ID 0 +#if (RTE_ENET_RMII_CRS_PORT_ID == 0) +#define RTE_ENET_RMII_CRS_PORT 1 +#define RTE_ENET_RMII_CRS_PIN 8 +#define RTE_ENET_RMII_CRS_FUNC 1 +#else +#error "Invalid ENET_CRS Pin Configuration!" +#endif +// ENET_RXD0 Pin <0=>P1_9 +#define RTE_ENET_RMII_RXD0_PORT_ID 0 +#if (RTE_ENET_RMII_RXD0_PORT_ID == 0) +#define RTE_ENET_RMII_RXD0_PORT 1 +#define RTE_ENET_RMII_RXD0_PIN 9 +#define RTE_ENET_RMII_RXD0_FUNC 1 +#else +#error "Invalid ENET_RXD0 Pin Configuration!" +#endif +// ENET_RXD1 Pin <0=>P1_10 +#define RTE_ENET_RMII_RXD1_PORT_ID 0 +#if (RTE_ENET_RMII_RXD1_PORT_ID == 0) +#define RTE_ENET_RMII_RXD1_PORT 1 +#define RTE_ENET_RMII_RXD1_PIN 10 +#define RTE_ENET_RMII_RXD1_FUNC 1 +#else +#error "Invalid ENET_RXD1 Pin Configuration!" +#endif +// ENET_RX_ER Pin <0=>P1_14 +#define RTE_ENET_RMII_RX_ER_PORT_ID 0 +#if (RTE_ENET_RMII_RX_ER_PORT_ID == 0) +#define RTE_ENET_RMII_RX_ER_PORT 1 +#define RTE_ENET_RMII_RX_ER_PIN 14 +#define RTE_ENET_RMII_RX_ER_FUNC 1 +#else +#error "Invalid ENET_REF_CLK Pin Configuration!" +#endif +// + +// MIIM (Management Data Interface) +// ENET_MDC Pin <0=>P1_16 <1=>P2_8 +#define RTE_ENET_MDI_MDC_PORT_ID 0 +#if (RTE_ENET_MDI_MDC_PORT_ID == 0) +#define RTE_ENET_MDI_MDC_PORT 1 +#define RTE_ENET_MDI_MDC_PIN 16 +#define RTE_ENET_MDI_MDC_FUNC 1 +#elif (RTE_ENET_MDI_MDC_PORT_ID == 1) +#define RTE_ENET_MDI_MDC_PORT 2 +#define RTE_ENET_MDI_MDC_PIN 8 +#define RTE_ENET_MDI_MDC_FUNC 3 +#else +#error "Invalid ENET_MDC Pin Configuration!" +#endif +// ENET_MDIO Pin <0=>P1_17 <1=>P2_9 +#define RTE_ENET_MDI_MDIO_PORT_ID 0 +#if (RTE_ENET_MDI_MDIO_PORT_ID == 0) +#define RTE_ENET_MDI_MDIO_PORT 1 +#define RTE_ENET_MDI_MDIO_PIN 17 +#define RTE_ENET_MDI_MDIO_FUNC 1 +#elif (RTE_ENET_MDI_MDIO_PORT_ID == 1) +#define RTE_ENET_MDI_MDIO_PORT 2 +#define RTE_ENET_MDI_MDIO_PIN 9 +#define RTE_ENET_MDI_MDIO_FUNC 3 +#else +#error "Invalid ENET_MDIO Pin Configuration!" +#endif +// + +// + + +// I2C0 (Inter-integrated Circuit Interface 0) [Driver_I2C0] +// Configuration settings for Driver_I2C0 in component ::Drivers:I2C +#define RTE_I2C0 0 + +// I2C0_SCL Pin <0=>P0_28 +#define RTE_I2C0_SCL_PORT_ID 0 +#if (RTE_I2C0_SCL_PORT_ID == 0) +#define RTE_I2C0_SCL_PORT 0 +#define RTE_I2C0_SCL_PIN 28 +#define RTE_I2C0_SCL_FUNC 1 +#else +#error "Invalid I2C0_SCL Pin Configuration!" +#endif + +// I2C0_SDA Pin <0=>P0_27 +#define RTE_I2C0_SDA_PORT_ID 0 +#if (RTE_I2C0_SDA_PORT_ID == 0) +#define RTE_I2C0_SDA_PORT 0 +#define RTE_I2C0_SDA_PIN 27 +#define RTE_I2C0_SDA_FUNC 1 +#else +#error "Invalid I2C0_SDA Pin Configuration!" +#endif + +// + + +// I2C1 (Inter-integrated Circuit Interface 1) [Driver_I2C1] +// Configuration settings for Driver_I2C1 in component ::Drivers:I2C +#define RTE_I2C1 0 + +// I2C1_SCL Pin <0=>P0_1 <1=>P0_20 +#define RTE_I2C1_SCL_PORT_ID 0 +#if (RTE_I2C1_SCL_PORT_ID == 0) +#define RTE_I2C1_SCL_PORT 0 +#define RTE_I2C1_SCL_PIN 1 +#define RTE_I2C1_SCL_FUNC 3 +#elif (RTE_I2C1_SCL_PORT_ID == 1) +#define RTE_I2C1_SCL_PORT 0 +#define RTE_I2C1_SCL_PIN 20 +#define RTE_I2C1_SCL_FUNC 3 +#else +#error "Invalid I2C1_SCL Pin Configuration!" +#endif + +// I2C1_SDA Pin <0=>P0_0 <1=>P0_19 +#define RTE_I2C1_SDA_PORT_ID 0 +#if (RTE_I2C1_SDA_PORT_ID == 0) +#define RTE_I2C1_SDA_PORT 0 +#define RTE_I2C1_SDA_PIN 0 +#define RTE_I2C1_SDA_FUNC 3 +#elif (RTE_I2C1_SDA_PORT_ID == 1) +#define RTE_I2C1_SDA_PORT 0 +#define RTE_I2C1_SDA_PIN 19 +#define RTE_I2C1_SDA_FUNC 3 +#else +#error "Invalid I2C1_SDA Pin Configuration!" +#endif + +// + + +// I2C2 (Inter-integrated Circuit Interface 2) [Driver_I2C2] +// Configuration settings for Driver_I2C2 in component ::Drivers:I2C +#define RTE_I2C2 0 + +// I2C2_SCL Pin <0=>P0_11 +#define RTE_I2C2_SCL_PORT_ID 0 +#if (RTE_I2C2_SCL_PORT_ID == 0) +#define RTE_I2C2_SCL_PORT 0 +#define RTE_I2C2_SCL_PIN 11 +#define RTE_I2C2_SCL_FUNC 2 +#else +#error "Invalid I2C2_SCL Pin Configuration!" +#endif + +// I2C2_SDA Pin <0=>P0_10 +#define RTE_I2C2_SDA_PORT_ID 0 +#if (RTE_I2C2_SDA_PORT_ID == 0) +#define RTE_I2C2_SDA_PORT 0 +#define RTE_I2C2_SDA_PIN 10 +#define RTE_I2C2_SDA_FUNC 2 +#else +#error "Invalid I2C2_SDA Pin Configuration!" +#endif + +// + +// UART0 (Universal asynchronous receiver transmitter) +#define RTE_UART0 0 + +// UART0_TX Pin <0=>Not used <1=>P0_2 +// UART0 Serial Output pin +#define RTE_UART0_TX_ID 0 +#if (RTE_UART0_TX_ID == 0) +#define RTE_UART0_TX_PIN_EN 0 +#elif (RTE_UART0_TX_ID == 1) +#define RTE_UART0_TX_PORT 0 +#define RTE_UART0_TX_BIT 2 +#define RTE_UART0_TX_FUNC 1 +#else +#error "Invalid UART0_TX Pin Configuration!" +#endif +#ifndef RTE_UART0_TX_PIN_EN +#define RTE_UART0_TX_PIN_EN 1 +#endif + +// UART0_RX Pin <0=>Not used <1=>P0_3 +// UART0 Serial Input pin +#define RTE_UART0_RX_ID 0 +#if (RTE_UART0_RX_ID == 0) +#define RTE_UART0_RX_PIN_EN 0 +#elif (RTE_UART0_RX_ID == 1) +#define RTE_UART0_RX_PORT 0 +#define RTE_UART0_RX_BIT 3 +#define RTE_UART0_RX_FUNC 1 +#else +#error "Invalid UART0_RX Pin Configuration!" +#endif +#ifndef RTE_UART0_RX_PIN_EN +#define RTE_UART0_RX_PIN_EN 1 +#endif + +// DMA +// Tx +// Channel <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7 +// +#define RTE_UART0_DMA_TX_EN 1 +#define RTE_UART0_DMA_TX_CH 0 +// Rx +// Channel <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7 +// +#define RTE_UART0_DMA_RX_EN 1 +#define RTE_UART0_DMA_RX_CH 1 +// DMA + +// +// UART1 (Universal asynchronous receiver transmitter) +#define RTE_UART1 0 + +// U1_TX Pin <0=>Not used <1=>P0_15 <2=>P2_0 +// UART1 Serial Output pin +#define RTE_UART1_TX_ID 1 +#if (RTE_UART1_TX_ID == 0) +#define RTE_UART1_TX_PIN_EN 0 +#elif (RTE_UART1_TX_ID == 1) +#define RTE_UART1_TX_PORT 0 +#define RTE_UART1_TX_BIT 15 +#define RTE_UART1_TX_FUNC 1 +#elif (RTE_UART1_TX_ID == 2) +#define RTE_UART1_TX_PORT 2 +#define RTE_UART1_TX_BIT 0 +#define RTE_UART1_TX_FUNC 2 +#else +#error "Invalid U1_TX Pin Configuration!" +#endif +#ifndef RTE_UART1_TX_PIN_EN +#define RTE_UART1_TX_PIN_EN 1 +#endif + +// U1_RX Pin <0=>Not used <1=>P0_16 <2=>P2_1 +// UART1 Serial Input pin +#define RTE_UART1_RX_ID 1 +#if (RTE_UART1_RX_ID == 0) +#define RTE_UART1_RX_PIN_EN 0 +#elif (RTE_UART1_RX_ID == 1) +#define RTE_UART1_RX_PORT 0 +#define RTE_UART1_RX_BIT 16 +#define RTE_UART1_RX_FUNC 1 +#elif (RTE_UART1_RX_ID == 2) +#define RTE_UART1_RX_PORT 2 +#define RTE_UART1_RX_BIT 1 +#define RTE_UART1_RX_FUNC 2 +#else +#error "Invalid U1_RX Pin Configuration!" +#endif +#ifndef RTE_UART1_RX_PIN_EN +#define RTE_UART1_RX_PIN_EN 1 +#endif + +// Modem Lines +// CTS <0=>Not used <1=>P0_17 <2=>P2_2 +#define RTE_UART1_CTS_ID 0 +#if (RTE_UART1_CTS_ID == 0) +#define RTE_UART1_CTS_PIN_EN 0 +#elif (RTE_UART1_CTS_ID == 1) +#define RTE_UART1_CTS_PORT 0 +#define RTE_UART1_CTS_BIT 17 +#define RTE_UART1_CTS_FUNC 1 +#elif (RTE_UART1_CTS_ID == 2) +#define RTE_UART1_CTS_PORT 2 +#define RTE_UART1_CTS_BIT 2 +#define RTE_UART1_CTS_FUNC 2 +#else +#error "Invalid U1_CTS Pin Configuration!" +#endif +#ifndef RTE_UART1_CTS_PIN_EN +#define RTE_UART1_CTS_PIN_EN 1 +#endif + +// +// DCD <0=>Not used <1=>P0_18 <2=>P2_3 +#define RTE_UART1_DCD_ID 0 +#if (RTE_UART1_DCD_ID == 0) +#define RTE_UART1_DCD_PIN_EN 0 +#elif (RTE_UART1_DCD_ID == 1) +#define RTE_UART1_DCD_PORT 0 +#define RTE_UART1_DCD_BIT 18 +#define RTE_UART1_DCD_FUNC 1 +#elif (RTE_UART1_DCD_ID == 2) +#define RTE_UART1_DCD_PORT 2 +#define RTE_UART1_DCD_BIT 3 +#define RTE_UART1_DCD_FUNC 2 +#else +#error "Invalid UART1_DCD Pin Configuration!" +#endif +#ifndef RTE_UART1_DCD_PIN_EN +#define RTE_UART1_DCD_PIN_EN 1 +#endif + +// DSR <0=>Not used <1=>P0_19 <2=>P2_4 +#define RTE_UART1_DSR_ID 0 +#if (RTE_UART1_DSR_ID == 0) +#define RTE_UART1_DSR_PIN_EN 0 +#elif (RTE_UART1_DSR_ID == 1) +#define RTE_UART1_DSR_PORT 0 +#define RTE_UART1_DSR_BIT 19 +#define RTE_UART1_DSR_FUNC 1 +#elif (RTE_UART1_DSR_ID == 2) +#define RTE_UART1_DSR_PORT 2 +#define RTE_UART1_DSR_BIT 4 +#define RTE_UART1_DSR_FUNC 2 +#else +#error "Invalid UART1_DSR Pin Configuration!" +#endif +#ifndef RTE_UART1_DSR_PIN_EN +#define RTE_UART1_DSR_PIN_EN 1 +#endif + +// DTR <0=>Not used <1=>P0_20 <2=>P2_5 +#define RTE_UART1_DTR_ID 0 +#if (RTE_UART1_DTR_ID == 0) +#define RTE_UART1_DTR_PIN_EN 0 +#elif (RTE_UART1_DTR_ID == 1) +#define RTE_UART1_DTR_PORT 0 +#define RTE_UART1_DTR_BIT 20 +#define RTE_UART1_DTR_FUNC 1 +#elif (RTE_UART1_DTR_ID == 2) +#define RTE_UART1_DTR_PORT 2 +#define RTE_UART1_DTR_BIT 5 +#define RTE_UART1_DTR_FUNC 2 +#else +#error "Invalid UART1_DTR Pin Configuration!" +#endif +#ifndef RTE_UART1_DTR_PIN_EN +#define RTE_UART1_DTR_PIN_EN 1 +#endif + +// RI <0=>Not used <1=>P0_21 <2=>P2_6 +#define RTE_UART1_RI_ID 0 +#if (RTE_UART1_RI_ID == 0) +#define RTE_UART1_RI_PIN_EN 0 +#elif (RTE_UART1_RI_ID == 1) +#define RTE_UART1_RI_PORT 0 +#define RTE_UART1_RI_BIT 21 +#define RTE_UART1_RI_FUNC 1 +#elif (RTE_UART1_RI_ID == 2) +#define RTE_UART1_RI_PORT 2 +#define RTE_UART1_RI_BIT 6 +#define RTE_UART1_RI_FUNC 2 +#else +#error "Invalid UART1_RI Pin Configuration!" +#endif +#ifndef RTE_UART1_RI_PIN_EN +#define RTE_UART1_RI_PIN_EN 1 +#endif + +// RTS <0=>Not used <1=>P0_22 <2=>P2_7 +#define RTE_UART1_RTS_ID 0 +#if (RTE_UART1_RTS_ID == 0) +#define RTE_UART1_RTS_PIN_EN 0 +#elif (RTE_UART1_RTS_ID == 1) +#define RTE_UART1_RTS_PORT 0 +#define RTE_UART1_RTS_BIT 22 +#define RTE_UART1_RTS_FUNC 1 +#elif (RTE_UART1_RTS_ID == 2) +#define RTE_UART1_RTS_PORT 2 +#define RTE_UART1_RTS_BIT 7 +#define RTE_UART1_RTS_FUNC 2 +#else +#error "Invalid UART1_RTS Pin Configuration!" +#endif +#ifndef RTE_UART1_RTS_PIN_EN +#define RTE_UART1_RTS_PIN_EN 1 +#endif + +// + +// DMA +// Tx +// Channel <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7 +// +#define RTE_UART1_DMA_TX_EN 1 +#define RTE_UART1_DMA_TX_CH 0 +// Rx +// Channel <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7 +// +#define RTE_UART1_DMA_RX_EN 1 +#define RTE_UART1_DMA_RX_CH 1 +// DMA + +// + +// UART2 (Universal asynchronous receiver transmitter) +#define RTE_UART2 0 + +// UART2_TX Pin <0=>Not used <1=>P0_10 <2=>P2_8 +// UART2 Serial Output pin +#define RTE_UART2_TX_ID 0 +#if (RTE_UART2_TX_ID == 0) +#define RTE_UART2_TX_PIN_EN 0 +#elif (RTE_UART2_TX_ID == 1) +#define RTE_UART2_TX_PORT 0 +#define RTE_UART2_TX_BIT 10 +#define RTE_UART2_TX_FUNC 1 +#elif (RTE_UART2_TX_ID == 2) +#define RTE_UART2_TX_PORT 2 +#define RTE_UART2_TX_BIT 8 +#define RTE_UART2_TX_FUNC 2 +#else +#error "Invalid UART2_TX Pin Configuration!" +#endif +#ifndef RTE_UART2_TX_PIN_EN +#define RTE_UART2_TX_PIN_EN 1 +#endif + +// UART2_RX Pin <0=>Not used <1=>P0_11 <2=>P2_9 +// UART2 Serial Input pin +#define RTE_UART2_RX_ID 0 +#if (RTE_UART2_RX_ID == 0) +#define RTE_UART2_RX_PIN_EN 0 +#elif (RTE_UART2_RX_ID == 1) +#define RTE_UART2_RX_PORT 0 +#define RTE_UART2_RX_BIT 11 +#define RTE_UART2_RX_FUNC 1 +#elif (RTE_UART2_RX_ID == 2) +#define RTE_UART2_RX_PORT 2 +#define RTE_UART2_RX_BIT 9 +#define RTE_UART2_RX_FUNC 2 +#else +#error "Invalid UART2_RX Pin Configuration!" +#endif +#ifndef RTE_UART2_RX_PIN_EN +#define RTE_UART2_RX_PIN_EN 1 +#endif + +// DMA +// Tx +// Channel <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7 +// +#define RTE_UART2_DMA_TX_EN 1 +#define RTE_UART2_DMA_TX_CH 0 +// Rx +// Channel <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7 +// +#define RTE_UART2_DMA_RX_EN 1 +#define RTE_UART2_DMA_RX_CH 1 +// DMA + +// + +// UART3 (Universal asynchronous receiver transmitter) +#define RTE_UART3 0 + +// UART3_TX Pin <0=>Not used <1=>P0_0 <2=>P0_25 <3=>P4_28 +// UART3 Serial Output pin +#define RTE_UART3_TX_ID 0 +#if (RTE_UART3_TX_ID == 0) +#define RTE_UART3_TX_PIN_EN 0 +#elif (RTE_UART3_TX_ID == 1) +#define RTE_UART3_TX_PORT 0 +#define RTE_UART3_TX_BIT 0 +#define RTE_UART3_TX_FUNC 2 +#elif (RTE_UART3_TX_ID == 2) +#define RTE_UART3_TX_PORT 0 +#define RTE_UART3_TX_BIT 25 +#define RTE_UART3_TX_FUNC 3 +#elif (RTE_UART3_TX_ID == 3) +#define RTE_UART3_TX_PORT 4 +#define RTE_UART3_TX_BIT 28 +#define RTE_UART3_TX_FUNC 3 +#else +#error "Invalid UART3_TX Pin Configuration!" +#endif +#ifndef RTE_UART3_TX_PIN_EN +#define RTE_UART3_TX_PIN_EN 1 +#endif + +// UART3_RX Pin <0=>Not used <1=>P0_1 <2=>P0_26 <3=>P4_29 +// UART3 Serial Input pin +#define RTE_UART3_RX_ID 0 +#if (RTE_UART3_RX_ID == 0) +#define RTE_UART3_RX_PIN_EN 0 +#elif (RTE_UART3_RX_ID == 1) +#define RTE_UART3_RX_PORT 0 +#define RTE_UART3_RX_BIT 1 +#define RTE_UART3_RX_FUNC 2 +#elif (RTE_UART3_RX_ID == 2) +#define RTE_UART3_RX_PORT 0 +#define RTE_UART3_RX_BIT 26 +#define RTE_UART3_RX_FUNC 3 +#elif (RTE_UART3_RX_ID == 3) +#define RTE_UART3_RX_PORT 4 +#define RTE_UART3_RX_BIT 29 +#define RTE_UART3_RX_FUNC 3 +#else +#error "Invalid UART3_RX Pin Configuration!" +#endif +#ifndef RTE_UART3_RX_PIN_EN +#define RTE_UART3_RX_PIN_EN 1 +#endif + +// DMA +// Tx +// Channel <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7 +// +#define RTE_UART3_DMA_TX_EN 1 +#define RTE_UART3_DMA_TX_CH 0 +// Rx +// Channel <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7 +// +#define RTE_UART3_DMA_RX_EN 1 +#define RTE_UART3_DMA_RX_CH 1 +// DMA + +// + +// CAN1 Controller [Driver_CAN1] +// Configuration settings for Driver_CAN1 in component ::Drivers:CAN +#define RTE_CAN_CAN1 0 + +// Pin Configuration +// CAN1_RD <0=>Not used <1=>P0_0 <2=>P0_21 +// CAN1 receiver input. +#define RTE_CAN1_RD_ID 0 +#if (RTE_CAN1_RD_ID == 0) + #define RTE_CAN1_RD_PIN_EN 0 +#elif (RTE_CAN1_RD_ID == 1) + #define RTE_CAN1_RD_PORT 0 + #define RTE_CAN1_RD_BIT 0 + #define RTE_CAN1_RD_FUNC 1 +#elif (RTE_CAN1_RD_ID == 2) + #define RTE_CAN1_RD_PORT 0 + #define RTE_CAN1_RD_BIT 21 + #define RTE_CAN1_RD_FUNC 3 +#else + #error "Invalid RTE_CAN1_RD Pin Configuration!" +#endif +#ifndef RTE_CAN1_RD_PIN_EN + #define RTE_CAN1_RD_PIN_EN 1 +#endif +// CAN1_TD <0=>Not used <1=>P0_1 <2=>P0_22 +// CAN1 transmitter output. +#define RTE_CAN1_TD_ID 0 +#if (RTE_CAN1_TD_ID == 0) + #define RTE_CAN1_TD_PIN_EN 0 +#elif (RTE_CAN1_TD_ID == 1) + #define RTE_CAN1_TD_PORT 0 + #define RTE_CAN1_TD_BIT 1 + #define RTE_CAN1_TD_FUNC 1 +#elif (RTE_CAN1_TD_ID == 2) + #define RTE_CAN1_TD_PORT 0 + #define RTE_CAN1_TD_BIT 22 + #define RTE_CAN1_TD_FUNC 3 +#else + #error "Invalid RTE_CAN1_TD Pin Configuration!" +#endif +#ifndef RTE_CAN1_TD_PIN_EN + #define RTE_CAN1_TD_PIN_EN 1 +#endif +// Pin Configuration +// CAN1 Controller [Driver_CAN1] + +// CAN2 Controller [Driver_CAN2] +// Configuration settings for Driver_CAN2 in component ::Drivers:CAN +#define RTE_CAN_CAN2 0 + +// Pin Configuration +// CAN2_RD <0=>Not used <1=>P0_4 <2=>P2_7 +// CAN2 receiver input. +#define RTE_CAN2_RD_ID 0 +#if (RTE_CAN2_RD_ID == 0) + #define RTE_CAN2_RD_PIN_EN 0 +#elif (RTE_CAN2_RD_ID == 1) + #define RTE_CAN2_RD_PORT 0 + #define RTE_CAN2_RD_BIT 4 + #define RTE_CAN2_RD_FUNC 2 +#elif (RTE_CAN2_RD_ID == 2) + #define RTE_CAN2_RD_PORT 2 + #define RTE_CAN2_RD_BIT 7 + #define RTE_CAN2_RD_FUNC 1 +#else + #error "Invalid RTE_CAN2_RD Pin Configuration!" +#endif +#ifndef RTE_CAN2_RD_PIN_EN + #define RTE_CAN2_RD_PIN_EN 1 +#endif +// CAN2_TD <0=>Not used <1=>P0_5 <2=>P2_8 +// CAN2 transmitter output. +#define RTE_CAN2_TD_ID 0 +#if (RTE_CAN2_TD_ID == 0) + #define RTE_CAN2_TD_PIN_EN 0 +#elif (RTE_CAN2_TD_ID == 1) + #define RTE_CAN2_TD_PORT 0 + #define RTE_CAN2_TD_BIT 5 + #define RTE_CAN2_TD_FUNC 2 +#elif (RTE_CAN2_TD_ID == 2) + #define RTE_CAN2_TD_PORT 2 + #define RTE_CAN2_TD_BIT 8 + #define RTE_CAN2_TD_FUNC 1 +#else + #error "Invalid RTE_CAN2_TD Pin Configuration!" +#endif +#ifndef RTE_CAN2_TD_PIN_EN + #define RTE_CAN2_TD_PIN_EN 1 +#endif +// Pin Configuration +// CAN2 Controller [Driver_CAN2] + + +// SSP0 (Synchronous Serial Port 0) [Driver_SPI0] +// Configuration settings for Driver_SPI0 in component ::Drivers:SPI +#define RTE_SSP0 0 + +// Pin Configuration +// SSP0_SSEL <0=>Not used <1=>P0_16 <2=>P1_21 +// Slave Select for SSP0 +#define RTE_SSP0_SSEL_PIN_SEL 1 +#if (RTE_SSP0_SSEL_PIN_SEL == 0) +#define RTE_SSP0_SSEL_PIN_EN 0 +#elif (RTE_SSP0_SSEL_PIN_SEL == 1) + #define RTE_SSP0_SSEL_PORT 0 + #define RTE_SSP0_SSEL_BIT 16 + #define RTE_SSP0_SSEL_FUNC 2 +#elif (RTE_SSP0_SSEL_PIN_SEL == 2) + #define RTE_SSP0_SSEL_PORT 1 + #define RTE_SSP0_SSEL_BIT 21 + #define RTE_SSP0_SSEL_FUNC 3 +#else + #error "Invalid SSP0 SSP0_SSEL Pin Configuration!" +#endif +#ifndef RTE_SSP0_SSEL_PIN_EN +#define RTE_SSP0_SSEL_PIN_EN 1 +#endif + +// SSP0_SCK <0=>P0_15 <1=>P1_20 +// Serial clock for SSP0 +#define RTE_SSP0_SCK_PIN_SEL 0 +#if (RTE_SSP0_SCK_PIN_SEL == 0) + #define RTE_SSP0_SCK_PORT 0 + #define RTE_SSP0_SCK_BIT 15 + #define RTE_SSP0_SCK_FUNC 2 +#elif (RTE_SSP0_SCK_PIN_SEL == 1) + #define RTE_SSP0_SCK_PORT 1 + #define RTE_SSP0_SCK_BIT 20 + #define RTE_SSP0_SCK_FUNC 3 +#else + #error "Invalid SSP0 SSP0_SCK Pin Configuration!" +#endif + +// SSP0_MISO <0=>Not used <1=>P0_17 <2=>P1_23 +// Master In Slave Out for SSP0 +#define RTE_SSP0_MISO_PIN_SEL 0 +#if (RTE_SSP0_MISO_PIN_SEL == 0) + #define RTE_SSP0_MISO_PIN_EN 0 +#elif (RTE_SSP0_MISO_PIN_SEL == 1) + #define RTE_SSP0_MISO_PORT 0 + #define RTE_SSP0_MISO_BIT 17 + #define RTE_SSP0_MISO_FUNC 2 +#elif (RTE_SSP0_MISO_PIN_SEL == 2) + #define RTE_SSP0_MISO_PORT 1 + #define RTE_SSP0_MISO_BIT 23 + #define RTE_SSP0_MISO_FUNC 3 +#else + #error "Invalid SSP0 SSP0_MISO Pin Configuration!" +#endif +#ifndef RTE_SSP0_MISO_PIN_EN +#define RTE_SSP0_MISO_PIN_EN 1 +#endif + +// SSP0_MOSI <0=>Not used <1=>P0_18 <2=>P1_24 +// Master Out Slave In for SSP0 +#define RTE_SSP0_MOSI_PIN_SEL 0 +#if (RTE_SSP0_MOSI_PIN_SEL == 0) + #define RTE_SSP0_MOSI_PIN_EN 0 +#elif (RTE_SSP0_MOSI_PIN_SEL == 1) + #define RTE_SSP0_MOSI_PORT 0 + #define RTE_SSP0_MOSI_BIT 18 + #define RTE_SSP0_MOSI_FUNC 2 +#elif (RTE_SSP0_MOSI_PIN_SEL == 2) + #define RTE_SSP0_MOSI_PORT 1 + #define RTE_SSP0_MOSI_BIT 24 + #define RTE_SSP0_MOSI_FUNC 3 +#else + #error "Invalid SSP0 SSP0_MOSI Pin Configuration!" +#endif +#ifndef RTE_SSP0_MOSI_PIN_EN +#define RTE_SSP0_MOSI_PIN_EN 1 +#endif + +// +// DMA +// Tx +// Channel <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7 +// +#define RTE_SSP0_DMA_TX_EN 0 +#define RTE_SSP0_DMA_TX_CH 0 +// Rx +// Channel <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7 +// +#define RTE_SSP0_DMA_RX_EN 0 +#define RTE_SSP0_DMA_RX_CH 1 +// DMA +// + +// SSP1 (Synchronous Serial Port 1) [Driver_SPI1] +// Configuration settings for Driver_SPI1 in component ::Drivers:SPI +#define RTE_SSP1 0 + +// Pin Configuration +// SSP1_SSEL <0=>Not used <1=>P0_6 +// Slave Select for SSP1 +#define RTE_SSP1_SSEL_PIN_SEL 1 +#if (RTE_SSP1_SSEL_PIN_SEL == 0) + #define RTE_SSP1_SSEL_PIN_EN 0 +#elif (RTE_SSP1_SSEL_PIN_SEL == 1) + #define RTE_SSP1_SSEL_PORT 0 + #define RTE_SSP1_SSEL_BIT 6 + #define RTE_SSP1_SSEL_FUNC 2 +#else + #error "Invalid SSP1 SSP1_SSEL Pin Configuration!" +#endif +#ifndef RTE_SSP1_SSEL_PIN_EN +#define RTE_SSP1_SSEL_PIN_EN 1 +#endif + +// SSP1_SCK <0=>P0_7 <1=>P1_31 +// Serial clock for SSP1 +#define RTE_SSP1_SCK_PIN_SEL 0 +#if (RTE_SSP1_SCK_PIN_SEL == 0) + #define RTE_SSP1_SCK_PORT 0 + #define RTE_SSP1_SCK_BIT 7 + #define RTE_SSP1_SCK_FUNC 2 +#elif (RTE_SSP1_SCK_PIN_SEL == 1) + #define RTE_SSP1_SCK_PORT 1 + #define RTE_SSP1_SCK_BIT 31 + #define RTE_SSP1_SCK_FUNC 2 +#else + #error "Invalid SSP1 SSP1_SCK Pin Configuration!" +#endif + +// SSP1_MISO <0=>Not used <1=>P0_8 +// Master In Slave Out for SSP1 +#define RTE_SSP1_MISO_PIN_SEL 0 +#if (RTE_SSP1_MISO_PIN_SEL == 0) + #define RTE_SSP1_MISO_PIN_EN 0 +#elif (RTE_SSP1_MISO_PIN_SEL == 1) + #define RTE_SSP1_MISO_PORT 0 + #define RTE_SSP1_MISO_BIT 8 + #define RTE_SSP1_MISO_FUNC 2 +#else + #error "Invalid SSP1 SSP1_MISO Pin Configuration!" +#endif +#ifndef RTE_SSP1_MISO_PIN_EN +#define RTE_SSP1_MISO_PIN_EN 1 +#endif + +// SSP1_MOSI <0=>Not used <1=>P0_9 +// Master Out Slave In for SSP1 +#define RTE_SSP1_MOSI_PIN_SEL 0 +#if (RTE_SSP1_MOSI_PIN_SEL == 0) + #define RTE_SSP1_MOSI_PIN_EN 0 +#elif (RTE_SSP1_MOSI_PIN_SEL == 1) + #define RTE_SSP1_MOSI_PORT 0 + #define RTE_SSP1_MOSI_BIT 9 + #define RTE_SSP1_MOSI_FUNC 2 +#else + #error "Invalid SSP1 SSP1_MOSI Pin Configuration!" +#endif +#ifndef RTE_SSP1_MOSI_PIN_EN +#define RTE_SSP1_MOSI_PIN_EN 1 +#endif + +// +// DMA +// Tx +// Channel <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7 +// +#define RTE_SSP1_DMA_TX_EN 0 +#define RTE_SSP1_DMA_TX_CH 2 +// Rx +// Channel <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7 +// +#define RTE_SSP1_DMA_RX_EN 0 +#define RTE_SSP1_DMA_RX_CH 3 +// DMA +// + + +// SPI (Serial Peripheral Interface) [Driver_SPI2] +// Configuration settings for Driver_SPI2 in component ::Drivers:SPI +#define RTE_SPI 0 + +// Pin Configuration +// SPI_SSEL <0=>Not used <1=>P0_16 +// Slave Select for SPI +#define RTE_SPI_SSEL_PIN_SEL 0 +#if (RTE_SPI_SSEL_PIN_SEL == 0) +#define RTE_SPI_SSEL_PIN_EN 0 +#elif (RTE_SPI_SSEL_PIN_SEL == 1) + #define RTE_SPI_SSEL_PORT 0 + #define RTE_SPI_SSEL_BIT 16 + #define RTE_SPI_SSEL_FUNC 3 +#else + #error "Invalid SPI SPI_SSEL Pin Configuration!" +#endif +#ifndef RTE_SPI_SSEL_PIN_EN +#define RTE_SPI_SSEL_PIN_EN 1 +#endif +// SPI_SCK <0=>P0_15 +// Serial clock for SPI +#define RTE_SPI_SCK_PIN_SEL 0 +#if (RTE_SPI_SCK_PIN_SEL == 0) + #define RTE_SPI_SCK_PORT 0 + #define RTE_SPI_SCK_BIT 15 + #define RTE_SPI_SCK_FUNC 3 +#else + #error "Invalid SPI SPI_SCK Pin Configuration!" +#endif +// SPI_MISO <0=>Not used <1=>P0_17 +// Master In Slave Out for SPI +#define RTE_SPI_MISO_PIN_SEL 0 +#if (RTE_SPI_MISO_PIN_SEL == 0) + #define RTE_SPI_MISO_PIN_EN 0 +#elif (RTE_SPI_MISO_PIN_SEL == 1) + #define RTE_SPI_MISO_PORT 0 + #define RTE_SPI_MISO_BIT 17 + #define RTE_SPI_MISO_FUNC 3 +#else + #error "Invalid SPI SPI_MISO Pin Configuration!" +#endif +#ifndef RTE_SPI_MISO_PIN_EN +#define RTE_SPI_MISO_PIN_EN 1 +#endif + +// SPI_MOSI <0=>Not used <1=>P0_18 +// Master Out Slave In for SPI +#define RTE_SPI_MOSI_PIN_SEL 0 +#if (RTE_SPI_MOSI_PIN_SEL == 0) + #define RTE_SPI_MOSI_PIN_EN 0 +#elif (RTE_SPI_MOSI_PIN_SEL == 1) + #define RTE_SPI_MOSI_PORT 0 + #define RTE_SPI_MOSI_BIT 18 + #define RTE_SPI_MOSI_FUNC 3 +#else + #error "Invalid SPI SPI_MOSI Pin Configuration!" +#endif +#ifndef RTE_SPI_MOSI_PIN_EN +#define RTE_SPI_MOSI_PIN_EN 1 +#endif + +// Pin Configuration +// SPI (Serial Peripheral Interface) [Driver_SPI2] + + +// I2S0 (Integrated Interchip Sound 0) [Driver_SAI0] +// Configuration settings for Driver_SAI0 in component ::Drivers:SAI +#define RTE_I2S0 0 + +// Pin Configuration +// I2S0_RX_SCK <0=>Not used <1=>P0_4 <2=>P0_23 +// Receive clock for I2S0 +#define RTE_I2S0_RX_SCK_PIN_SEL 1 +#if (RTE_I2S0_RX_SCK_PIN_SEL == 0) +#define RTE_I2S0_RX_SCK_PIN_EN 0 +#elif (RTE_I2S0_RX_SCK_PIN_SEL == 1) + #define RTE_I2S0_RX_SCK_PORT 0 + #define RTE_I2S0_RX_SCK_BIT 4 + #define RTE_I2S0_RX_SCK_FUNC 1 +#elif (RTE_I2S0_RX_SCK_PIN_SEL == 2) + #define RTE_I2S0_RX_SCK_PORT 0 + #define RTE_I2S0_RX_SCK_BIT 23 + #define RTE_I2S0_RX_SCK_FUNC 2 +#else + #error "Invalid I2S0 I2S0_RX_SCK Pin Configuration!" +#endif +#ifndef RTE_I2S0_RX_SCK_PIN_EN +#define RTE_I2S0_RX_SCK_PIN_EN 1 +#endif +// I2S0_RX_WS <0=>Not used <1=>P0_5 <2=>P0_24 +// Receive word select for I2S0 +#define RTE_I2S0_RX_WS_PIN_SEL 1 +#if (RTE_I2S0_RX_WS_PIN_SEL == 0) +#define RTE_I2S0_RX_WS_PIN_EN 0 +#elif (RTE_I2S0_RX_WS_PIN_SEL == 1) + #define RTE_I2S0_RX_WS_PORT 0 + #define RTE_I2S0_RX_WS_BIT 5 + #define RTE_I2S0_RX_WS_FUNC 1 +#elif (RTE_I2S0_RX_WS_PIN_SEL == 2) + #define RTE_I2S0_RX_WS_PORT 0 + #define RTE_I2S0_RX_WS_BIT 24 + #define RTE_I2S0_RX_WS_FUNC 2 +#else + #error "Invalid I2S0 I2S0_RX_WS Pin Configuration!" +#endif +#ifndef RTE_I2S0_RX_WS_PIN_EN +#define RTE_I2S0_RX_WS_PIN_EN 1 +#endif +// I2S0_RX_SDA <0=>Not used <1=>P0_6 <2=>P0_25 +// Receive master clock for I2S0 +#define RTE_I2S0_RX_SDA_PIN_SEL 1 +#if (RTE_I2S0_RX_SDA_PIN_SEL == 0) +#define RTE_I2S0_RX_SDA_PIN_EN 0 +#elif (RTE_I2S0_RX_SDA_PIN_SEL == 1) + #define RTE_I2S0_RX_SDA_PORT 0 + #define RTE_I2S0_RX_SDA_BIT 6 + #define RTE_I2S0_RX_SDA_FUNC 1 +#elif (RTE_I2S0_RX_SDA_PIN_SEL == 2) + #define RTE_I2S0_RX_SDA_PORT 0 + #define RTE_I2S0_RX_SDA_BIT 25 + #define RTE_I2S0_RX_SDA_FUNC 2 +#else + #error "Invalid I2S0 I2S0_RX_SDA Pin Configuration!" +#endif +#ifndef RTE_I2S0_RX_SDA_PIN_EN +#define RTE_I2S0_RX_SDA_PIN_EN 1 +#endif +// I2S0_RX_MCLK <0=>Not used <1=>P4_28 +// Receive master clock for I2S0 +#define RTE_I2S0_RX_MCLK_PIN_SEL 0 +#if (RTE_I2S0_RX_MCLK_PIN_SEL == 0) +#define RTE_I2S0_RX_MCLK_PIN_EN 0 +#elif (RTE_I2S0_RX_MCLK_PIN_SEL == 1) + #define RTE_I2S0_RX_MCLK_PORT 4 + #define RTE_I2S0_RX_MCLK_BIT 28 + #define RTE_I2S0_RX_MCLK_FUNC 1 +#else + #error "Invalid I2S0 I2S0_RX_MCLK Pin Configuration!" +#endif +#ifndef RTE_I2S0_RX_MCLK_PIN_EN +#define RTE_I2S0_RX_MCLK_PIN_EN 1 +#endif +// I2S0_TX_SCK <0=>Not used <1=>P0_7 <2=>P2_11 +// Transmit clock for I2S0 +#define RTE_I2S0_TX_SCK_PIN_SEL 1 +#if (RTE_I2S0_TX_SCK_PIN_SEL == 0) +#define RTE_I2S0_TX_SCK_PIN_EN 0 +#elif (RTE_I2S0_TX_SCK_PIN_SEL == 1) + #define RTE_I2S0_TX_SCK_PORT 0 + #define RTE_I2S0_TX_SCK_BIT 7 + #define RTE_I2S0_TX_SCK_FUNC 1 +#elif (RTE_I2S0_TX_SCK_PIN_SEL == 2) + #define RTE_I2S0_TX_SCK_PORT 2 + #define RTE_I2S0_TX_SCK_BIT 11 + #define RTE_I2S0_TX_SCK_FUNC 3 +#else + #error "Invalid I2S0 I2S0_TX_SCK Pin Configuration!" +#endif +#ifndef RTE_I2S0_TX_SCK_PIN_EN +#define RTE_I2S0_TX_SCK_PIN_EN 1 +#endif +// I2S0_TX_WS <0=>Not used <1=>P0_8 <2=>P2_12 +// Transmit word select for I2S0 +#define RTE_I2S0_TX_WS_PIN_SEL 1 +#if (RTE_I2S0_TX_WS_PIN_SEL == 0) +#define RTE_I2S0_TX_WS_PIN_EN 0 +#elif (RTE_I2S0_TX_WS_PIN_SEL == 1) + #define RTE_I2S0_TX_WS_PORT 0 + #define RTE_I2S0_TX_WS_BIT 8 + #define RTE_I2S0_TX_WS_FUNC 1 +#elif (RTE_I2S0_TX_WS_PIN_SEL == 2) + #define RTE_I2S0_TX_WS_PORT 2 + #define RTE_I2S0_TX_WS_BIT 12 + #define RTE_I2S0_TX_WS_FUNC 3 +#else + #error "Invalid I2S0 I2S0_TX_WS Pin Configuration!" +#endif +#ifndef RTE_I2S0_TX_WS_PIN_EN +#define RTE_I2S0_TX_WS_PIN_EN 1 +#endif +// I2S0_TX_SDA <0=>Not used <1=>P0_9 <2=>P2_13 +// Transmit data for I2S0 +#define RTE_I2S0_TX_SDA_PIN_SEL 1 +#if (RTE_I2S0_TX_SDA_PIN_SEL == 0) +#define RTE_I2S0_TX_SDA_PIN_EN 0 +#elif (RTE_I2S0_TX_SDA_PIN_SEL == 1) + #define RTE_I2S0_TX_SDA_PORT 0 + #define RTE_I2S0_TX_SDA_BIT 9 + #define RTE_I2S0_TX_SDA_FUNC 1 +#elif (RTE_I2S0_TX_SDA_PIN_SEL == 2) + #define RTE_I2S0_TX_SDA_PORT 2 + #define RTE_I2S0_TX_SDA_BIT 13 + #define RTE_I2S0_TX_SDA_FUNC 3 +#else + #error "Invalid I2S0 I2S0_TX_SDA Pin Configuration!" +#endif +#ifndef RTE_I2S0_TX_SDA_PIN_EN +#define RTE_I2S0_TX_SDA_PIN_EN 1 +#endif +// I2S0_TX_MCLK <0=>Not used <1=>P4_29 +// Transmit master clock for I2S0 +#define RTE_I2S0_TX_MCLK_PIN_SEL 1 +#if (RTE_I2S0_TX_MCLK_PIN_SEL == 0) +#define RTE_I2S0_TX_MCLK_PIN_EN 0 +#elif (RTE_I2S0_TX_MCLK_PIN_SEL == 1) + #define RTE_I2S0_TX_MCLK_PORT 4 + #define RTE_I2S0_TX_MCLK_BIT 29 + #define RTE_I2S0_TX_MCLK_FUNC 1 +#else + #error "Invalid I2S0 I2S0_TX_MCLK Pin Configuration!" +#endif +#ifndef RTE_I2S0_TX_MCLK_PIN_EN +#define RTE_I2S0_TX_MCLK_PIN_EN 1 +#endif +// Pin Configuration + +// DMA +// Tx +// Channel <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7 +// Peripheral <0=>9 (DMAMUXPER9) +// +#define RTE_I2S0_DMA_TX_EN 1 +#define RTE_I2S0_DMA_TX_CH 0 +// Rx +// Channel <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7 +// Peripheral <0=>10 (DMAMUXPER10) +// +#define RTE_I2S0_DMA_RX_EN 1 +#define RTE_I2S0_DMA_RX_CH 1 +// DMA +// I2S0 (Integrated Interchip Sound 0) [Driver_SAI0] + +#endif /* __RTE_DEVICE_H */ diff --git a/F2024/coe718/labs/lab2/RTE/Device/LPC1768/startup_LPC17xx.s b/F2024/coe718/labs/lab2/RTE/Device/LPC1768/startup_LPC17xx.s new file mode 100755 index 0000000..02a0f9a --- /dev/null +++ b/F2024/coe718/labs/lab2/RTE/Device/LPC1768/startup_LPC17xx.s @@ -0,0 +1,287 @@ +;/**************************************************************************//** +; * @file startup_LPC17xx.s +; * @brief CMSIS Cortex-M3 Core Device Startup File for +; * NXP LPC17xx Device Series +; * @version V1.10 +; * @date 06. April 2011 +; * +; * @note +; * Copyright (C) 2009-2011 ARM Limited. All rights reserved. +; * +; * @par +; * ARM Limited (ARM) is supplying this software for use with Cortex-M +; * processor based microcontrollers. This file can be freely distributed +; * within development tools that are supporting such ARM based processors. +; * +; * @par +; * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED +; * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF +; * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. +; * ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR +; * CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER. +; * +; ******************************************************************************/ + +; *------- <<< Use Configuration Wizard in Context Menu >>> ------------------ + +; Stack Configuration +; Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> +; + +Stack_Size EQU 0x00000200 + + AREA STACK, NOINIT, READWRITE, ALIGN=3 +Stack_Mem SPACE Stack_Size +__initial_sp + + +; Heap Configuration +; Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> +; + +Heap_Size EQU 0x00000000 + + AREA HEAP, NOINIT, READWRITE, ALIGN=3 +__heap_base +Heap_Mem SPACE Heap_Size +__heap_limit + + + PRESERVE8 + THUMB + + +; Vector Table Mapped to Address 0 at Reset + + AREA RESET, DATA, READONLY + EXPORT __Vectors + +__Vectors DCD __initial_sp ; Top of Stack + DCD Reset_Handler ; Reset Handler + DCD NMI_Handler ; NMI Handler + DCD HardFault_Handler ; Hard Fault Handler + DCD MemManage_Handler ; MPU Fault Handler + DCD BusFault_Handler ; Bus Fault Handler + DCD UsageFault_Handler ; Usage Fault Handler + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD SVC_Handler ; SVCall Handler + DCD DebugMon_Handler ; Debug Monitor Handler + DCD 0 ; Reserved + DCD PendSV_Handler ; PendSV Handler + DCD SysTick_Handler ; SysTick Handler + + ; External Interrupts + DCD WDT_IRQHandler ; 16: Watchdog Timer + DCD TIMER0_IRQHandler ; 17: Timer0 + DCD TIMER1_IRQHandler ; 18: Timer1 + DCD TIMER2_IRQHandler ; 19: Timer2 + DCD TIMER3_IRQHandler ; 20: Timer3 + DCD UART0_IRQHandler ; 21: UART0 + DCD UART1_IRQHandler ; 22: UART1 + DCD UART2_IRQHandler ; 23: UART2 + DCD UART3_IRQHandler ; 24: UART3 + DCD PWM1_IRQHandler ; 25: PWM1 + DCD I2C0_IRQHandler ; 26: I2C0 + DCD I2C1_IRQHandler ; 27: I2C1 + DCD I2C2_IRQHandler ; 28: I2C2 + DCD SPI_IRQHandler ; 29: SPI + DCD SSP0_IRQHandler ; 30: SSP0 + DCD SSP1_IRQHandler ; 31: SSP1 + DCD PLL0_IRQHandler ; 32: PLL0 Lock (Main PLL) + DCD RTC_IRQHandler ; 33: Real Time Clock + DCD EINT0_IRQHandler ; 34: External Interrupt 0 + DCD EINT1_IRQHandler ; 35: External Interrupt 1 + DCD EINT2_IRQHandler ; 36: External Interrupt 2 + DCD EINT3_IRQHandler ; 37: External Interrupt 3 + DCD ADC_IRQHandler ; 38: A/D Converter + DCD BOD_IRQHandler ; 39: Brown-Out Detect + DCD USB_IRQHandler ; 40: USB + DCD CAN_IRQHandler ; 41: CAN + DCD DMA_IRQHandler ; 42: General Purpose DMA + DCD I2S_IRQHandler ; 43: I2S + DCD ENET_IRQHandler ; 44: Ethernet + DCD RIT_IRQHandler ; 45: Repetitive Interrupt Timer + DCD MCPWM_IRQHandler ; 46: Motor Control PWM + DCD QEI_IRQHandler ; 47: Quadrature Encoder Interface + DCD PLL1_IRQHandler ; 48: PLL1 Lock (USB PLL) + DCD USBActivity_IRQHandler ; 49: USB Activity interrupt to wakeup + DCD CANActivity_IRQHandler ; 50: CAN Activity interrupt to wakeup + + + IF :LNOT::DEF:NO_CRP + AREA |.ARM.__at_0x02FC|, CODE, READONLY +CRP_Key DCD 0xFFFFFFFF + ENDIF + + + AREA |.text|, CODE, READONLY + + +; Reset Handler + +Reset_Handler PROC + EXPORT Reset_Handler [WEAK] + IMPORT SystemInit + IMPORT __main + LDR R0, =SystemInit + BLX R0 + LDR R0, =__main + BX R0 + ENDP + + +; Dummy Exception Handlers (infinite loops which can be modified) + +NMI_Handler PROC + EXPORT NMI_Handler [WEAK] + B . + ENDP +HardFault_Handler\ + PROC + EXPORT HardFault_Handler [WEAK] + B . + ENDP +MemManage_Handler\ + PROC + EXPORT MemManage_Handler [WEAK] + B . + ENDP +BusFault_Handler\ + PROC + EXPORT BusFault_Handler [WEAK] + B . + ENDP +UsageFault_Handler\ + PROC + EXPORT UsageFault_Handler [WEAK] + B . + ENDP +SVC_Handler PROC + EXPORT SVC_Handler [WEAK] + B . + ENDP +DebugMon_Handler\ + PROC + EXPORT DebugMon_Handler [WEAK] + B . + ENDP +PendSV_Handler PROC + EXPORT PendSV_Handler [WEAK] + B . + ENDP +SysTick_Handler PROC + EXPORT SysTick_Handler [WEAK] + B . + ENDP + +Default_Handler PROC + + EXPORT WDT_IRQHandler [WEAK] + EXPORT TIMER0_IRQHandler [WEAK] + EXPORT TIMER1_IRQHandler [WEAK] + EXPORT TIMER2_IRQHandler [WEAK] + EXPORT TIMER3_IRQHandler [WEAK] + EXPORT UART0_IRQHandler [WEAK] + EXPORT UART1_IRQHandler [WEAK] + EXPORT UART2_IRQHandler [WEAK] + EXPORT UART3_IRQHandler [WEAK] + EXPORT PWM1_IRQHandler [WEAK] + EXPORT I2C0_IRQHandler [WEAK] + EXPORT I2C1_IRQHandler [WEAK] + EXPORT I2C2_IRQHandler [WEAK] + EXPORT SPI_IRQHandler [WEAK] + EXPORT SSP0_IRQHandler [WEAK] + EXPORT SSP1_IRQHandler [WEAK] + EXPORT PLL0_IRQHandler [WEAK] + EXPORT RTC_IRQHandler [WEAK] + EXPORT EINT0_IRQHandler [WEAK] + EXPORT EINT1_IRQHandler [WEAK] + EXPORT EINT2_IRQHandler [WEAK] + EXPORT EINT3_IRQHandler [WEAK] + EXPORT ADC_IRQHandler [WEAK] + EXPORT BOD_IRQHandler [WEAK] + EXPORT USB_IRQHandler [WEAK] + EXPORT CAN_IRQHandler [WEAK] + EXPORT DMA_IRQHandler [WEAK] + EXPORT I2S_IRQHandler [WEAK] + EXPORT ENET_IRQHandler [WEAK] + EXPORT RIT_IRQHandler [WEAK] + EXPORT MCPWM_IRQHandler [WEAK] + EXPORT QEI_IRQHandler [WEAK] + EXPORT PLL1_IRQHandler [WEAK] + EXPORT USBActivity_IRQHandler [WEAK] + EXPORT CANActivity_IRQHandler [WEAK] + +WDT_IRQHandler +TIMER0_IRQHandler +TIMER1_IRQHandler +TIMER2_IRQHandler +TIMER3_IRQHandler +UART0_IRQHandler +UART1_IRQHandler +UART2_IRQHandler +UART3_IRQHandler +PWM1_IRQHandler +I2C0_IRQHandler +I2C1_IRQHandler +I2C2_IRQHandler +SPI_IRQHandler +SSP0_IRQHandler +SSP1_IRQHandler +PLL0_IRQHandler +RTC_IRQHandler +EINT0_IRQHandler +EINT1_IRQHandler +EINT2_IRQHandler +EINT3_IRQHandler +ADC_IRQHandler +BOD_IRQHandler +USB_IRQHandler +CAN_IRQHandler +DMA_IRQHandler +I2S_IRQHandler +ENET_IRQHandler +RIT_IRQHandler +MCPWM_IRQHandler +QEI_IRQHandler +PLL1_IRQHandler +USBActivity_IRQHandler +CANActivity_IRQHandler + + B . + + ENDP + + + ALIGN + + +; User Initial Stack & Heap + + IF :DEF:__MICROLIB + + EXPORT __initial_sp + EXPORT __heap_base + EXPORT __heap_limit + + ELSE + + IMPORT __use_two_region_memory + EXPORT __user_initial_stackheap +__user_initial_stackheap + + LDR R0, = Heap_Mem + LDR R1, =(Stack_Mem + Stack_Size) + LDR R2, = (Heap_Mem + Heap_Size) + LDR R3, = Stack_Mem + BX LR + + ALIGN + + ENDIF + + + END diff --git a/F2024/coe718/labs/lab2/RTE/Device/LPC1768/system_LPC17xx.c b/F2024/coe718/labs/lab2/RTE/Device/LPC1768/system_LPC17xx.c new file mode 100755 index 0000000..44139ec --- /dev/null +++ b/F2024/coe718/labs/lab2/RTE/Device/LPC1768/system_LPC17xx.c @@ -0,0 +1,541 @@ +/**************************************************************************//** + * @file system_LPC17xx.c + * @brief CMSIS Device System Source File for + * NXP LPC17xx Device Series + * @version V1.14 + * @date 05. April 2016 + ******************************************************************************/ +/* Copyright (c) 2012 - 2016 ARM LIMITED + + All rights reserved. + Redistribution and use in source and binary forms, with or without + modification, are permitted provided that the following conditions are met: + - Redistributions of source code must retain the above copyright + notice, this list of conditions and the following disclaimer. + - Redistributions in binary form must reproduce the above copyright + notice, this list of conditions and the following disclaimer in the + documentation and/or other materials provided with the distribution. + - Neither the name of ARM nor the names of its contributors may be used + to endorse or promote products derived from this software without + specific prior written permission. + * + THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE + LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + POSSIBILITY OF SUCH DAMAGE. + ---------------------------------------------------------------------------*/ + +#include +#include "LPC17xx.h" + +/* +//-------- <<< Use Configuration Wizard in Context Menu >>> ------------------ +*/ + +/*--------------------- Clock Configuration ---------------------------------- +// +// Clock Configuration +// System Controls and Status Register (SCS) +// OSCRANGE: Main Oscillator Range Select +// <0=> 1 MHz to 20 MHz +// <1=> 15 MHz to 25 MHz +// OSCEN: Main Oscillator Enable +// +// +// +// Clock Source Select Register (CLKSRCSEL) +// CLKSRC: PLL Clock Source Selection +// <0=> Internal RC oscillator +// <1=> Main oscillator +// <2=> RTC oscillator +// +// +// PLL0 Configuration (Main PLL) +// PLL0 Configuration Register (PLL0CFG) +// F_cco0 = (2 * M * F_in) / N +// F_in must be in the range of 32 kHz to 50 MHz +// F_cco0 must be in the range of 275 MHz to 550 MHz +// MSEL: PLL Multiplier Selection +// <6-32768><#-1> +// M Value +// NSEL: PLL Divider Selection +// <1-256><#-1> +// N Value +// +// +// +// PLL1 Configuration (USB PLL) +// PLL1 Configuration Register (PLL1CFG) +// F_usb = M * F_osc or F_usb = F_cco1 / (2 * P) +// F_cco1 = F_osc * M * 2 * P +// F_cco1 must be in the range of 156 MHz to 320 MHz +// MSEL: PLL Multiplier Selection +// <1-32><#-1> +// M Value (for USB maximum value is 4) +// PSEL: PLL Divider Selection +// <0=> 1 +// <1=> 2 +// <2=> 4 +// <3=> 8 +// P Value +// +// +// +// CPU Clock Configuration Register (CCLKCFG) +// CCLKSEL: Divide Value for CPU Clock from PLL0 +// <1-256><#-1> +// +// +// USB Clock Configuration Register (USBCLKCFG) +// USBSEL: Divide Value for USB Clock from PLL0 +// <0-15> +// Divide is USBSEL + 1 +// +// +// Peripheral Clock Selection Register 0 (PCLKSEL0) +// PCLK_WDT: Peripheral Clock Selection for WDT +// <0=> Pclk = Cclk / 4 +// <1=> Pclk = Cclk +// <2=> Pclk = Cclk / 2 +// <3=> Pclk = Cclk / 8 +// PCLK_TIMER0: Peripheral Clock Selection for TIMER0 +// <0=> Pclk = Cclk / 4 +// <1=> Pclk = Cclk +// <2=> Pclk = Cclk / 2 +// <3=> Pclk = Cclk / 8 +// PCLK_TIMER1: Peripheral Clock Selection for TIMER1 +// <0=> Pclk = Cclk / 4 +// <1=> Pclk = Cclk +// <2=> Pclk = Cclk / 2 +// <3=> Pclk = Cclk / 8 +// PCLK_UART0: Peripheral Clock Selection for UART0 +// <0=> Pclk = Cclk / 4 +// <1=> Pclk = Cclk +// <2=> Pclk = Cclk / 2 +// <3=> Pclk = Cclk / 8 +// PCLK_UART1: Peripheral Clock Selection for UART1 +// <0=> Pclk = Cclk / 4 +// <1=> Pclk = Cclk +// <2=> Pclk = Cclk / 2 +// <3=> Pclk = Cclk / 8 +// PCLK_PWM1: Peripheral Clock Selection for PWM1 +// <0=> Pclk = Cclk / 4 +// <1=> Pclk = Cclk +// <2=> Pclk = Cclk / 2 +// <3=> Pclk = Cclk / 8 +// PCLK_I2C0: Peripheral Clock Selection for I2C0 +// <0=> Pclk = Cclk / 4 +// <1=> Pclk = Cclk +// <2=> Pclk = Cclk / 2 +// <3=> Pclk = Cclk / 8 +// PCLK_SPI: Peripheral Clock Selection for SPI +// <0=> Pclk = Cclk / 4 +// <1=> Pclk = Cclk +// <2=> Pclk = Cclk / 2 +// <3=> Pclk = Cclk / 8 +// PCLK_SSP1: Peripheral Clock Selection for SSP1 +// <0=> Pclk = Cclk / 4 +// <1=> Pclk = Cclk +// <2=> Pclk = Cclk / 2 +// <3=> Pclk = Cclk / 8 +// PCLK_DAC: Peripheral Clock Selection for DAC +// <0=> Pclk = Cclk / 4 +// <1=> Pclk = Cclk +// <2=> Pclk = Cclk / 2 +// <3=> Pclk = Cclk / 8 +// PCLK_ADC: Peripheral Clock Selection for ADC +// <0=> Pclk = Cclk / 4 +// <1=> Pclk = Cclk +// <2=> Pclk = Cclk / 2 +// <3=> Pclk = Cclk / 8 +// PCLK_CAN1: Peripheral Clock Selection for CAN1 +// <0=> Pclk = Cclk / 4 +// <1=> Pclk = Cclk +// <2=> Pclk = Cclk / 2 +// <3=> Pclk = Cclk / 6 +// PCLK_CAN2: Peripheral Clock Selection for CAN2 +// <0=> Pclk = Cclk / 4 +// <1=> Pclk = Cclk +// <2=> Pclk = Cclk / 2 +// <3=> Pclk = Cclk / 6 +// PCLK_ACF: Peripheral Clock Selection for ACF +// <0=> Pclk = Cclk / 4 +// <1=> Pclk = Cclk +// <2=> Pclk = Cclk / 2 +// <3=> Pclk = Cclk / 6 +// +// +// Peripheral Clock Selection Register 1 (PCLKSEL1) +// PCLK_QEI: Peripheral Clock Selection for the Quadrature Encoder Interface +// <0=> Pclk = Cclk / 4 +// <1=> Pclk = Cclk +// <2=> Pclk = Cclk / 2 +// <3=> Pclk = Cclk / 8 +// PCLK_GPIO: Peripheral Clock Selection for GPIOs +// <0=> Pclk = Cclk / 4 +// <1=> Pclk = Cclk +// <2=> Pclk = Cclk / 2 +// <3=> Pclk = Cclk / 8 +// PCLK_PCB: Peripheral Clock Selection for the Pin Connect Block +// <0=> Pclk = Cclk / 4 +// <1=> Pclk = Cclk +// <2=> Pclk = Cclk / 2 +// <3=> Pclk = Cclk / 8 +// PCLK_I2C1: Peripheral Clock Selection for I2C1 +// <0=> Pclk = Cclk / 4 +// <1=> Pclk = Cclk +// <2=> Pclk = Cclk / 2 +// <3=> Pclk = Cclk / 8 +// PCLK_SSP0: Peripheral Clock Selection for SSP0 +// <0=> Pclk = Cclk / 4 +// <1=> Pclk = Cclk +// <2=> Pclk = Cclk / 2 +// <3=> Pclk = Cclk / 8 +// PCLK_TIMER2: Peripheral Clock Selection for TIMER2 +// <0=> Pclk = Cclk / 4 +// <1=> Pclk = Cclk +// <2=> Pclk = Cclk / 2 +// <3=> Pclk = Cclk / 8 +// PCLK_TIMER3: Peripheral Clock Selection for TIMER3 +// <0=> Pclk = Cclk / 4 +// <1=> Pclk = Cclk +// <2=> Pclk = Cclk / 2 +// <3=> Pclk = Cclk / 8 +// PCLK_UART2: Peripheral Clock Selection for UART2 +// <0=> Pclk = Cclk / 4 +// <1=> Pclk = Cclk +// <2=> Pclk = Cclk / 2 +// <3=> Pclk = Cclk / 8 +// PCLK_UART3: Peripheral Clock Selection for UART3 +// <0=> Pclk = Cclk / 4 +// <1=> Pclk = Cclk +// <2=> Pclk = Cclk / 2 +// <3=> Pclk = Cclk / 8 +// PCLK_I2C2: Peripheral Clock Selection for I2C2 +// <0=> Pclk = Cclk / 4 +// <1=> Pclk = Cclk +// <2=> Pclk = Cclk / 2 +// <3=> Pclk = Cclk / 8 +// PCLK_I2S: Peripheral Clock Selection for I2S +// <0=> Pclk = Cclk / 4 +// <1=> Pclk = Cclk +// <2=> Pclk = Cclk / 2 +// <3=> Pclk = Cclk / 8 +// PCLK_RIT: Peripheral Clock Selection for the Repetitive Interrupt Timer +// <0=> Pclk = Cclk / 4 +// <1=> Pclk = Cclk +// <2=> Pclk = Cclk / 2 +// <3=> Pclk = Cclk / 8 +// PCLK_SYSCON: Peripheral Clock Selection for the System Control Block +// <0=> Pclk = Cclk / 4 +// <1=> Pclk = Cclk +// <2=> Pclk = Cclk / 2 +// <3=> Pclk = Cclk / 8 +// PCLK_MC: Peripheral Clock Selection for the Motor Control PWM +// <0=> Pclk = Cclk / 4 +// <1=> Pclk = Cclk +// <2=> Pclk = Cclk / 2 +// <3=> Pclk = Cclk / 8 +// +// +// Power Control for Peripherals Register (PCONP) +// PCTIM0: Timer/Counter 0 power/clock enable +// PCTIM1: Timer/Counter 1 power/clock enable +// PCUART0: UART 0 power/clock enable +// PCUART1: UART 1 power/clock enable +// PCPWM1: PWM 1 power/clock enable +// PCI2C0: I2C interface 0 power/clock enable +// PCSPI: SPI interface power/clock enable +// PCRTC: RTC power/clock enable +// PCSSP1: SSP interface 1 power/clock enable +// PCAD: A/D converter power/clock enable +// PCCAN1: CAN controller 1 power/clock enable +// PCCAN2: CAN controller 2 power/clock enable +// PCGPIO: GPIOs power/clock enable +// PCRIT: Repetitive interrupt timer power/clock enable +// PCMC: Motor control PWM power/clock enable +// PCQEI: Quadrature encoder interface power/clock enable +// PCI2C1: I2C interface 1 power/clock enable +// PCSSP0: SSP interface 0 power/clock enable +// PCTIM2: Timer 2 power/clock enable +// PCTIM3: Timer 3 power/clock enable +// PCUART2: UART 2 power/clock enable +// PCUART3: UART 3 power/clock enable +// PCI2C2: I2C interface 2 power/clock enable +// PCI2S: I2S interface power/clock enable +// PCGPDMA: GP DMA function power/clock enable +// PCENET: Ethernet block power/clock enable +// PCUSB: USB interface power/clock enable +// +// +// Clock Output Configuration Register (CLKOUTCFG) +// CLKOUTSEL: Selects clock source for CLKOUT +// <0=> CPU clock +// <1=> Main oscillator +// <2=> Internal RC oscillator +// <3=> USB clock +// <4=> RTC oscillator +// CLKOUTDIV: Selects clock divider for CLKOUT +// <1-16><#-1> +// CLKOUT_EN: CLKOUT enable control +// +// +// +*/ + + + +#define CLOCK_SETUP 1 +#define SCS_Val 0x00000020 +#define CLKSRCSEL_Val 0x00000001 +#define PLL0_SETUP 1 +#define PLL0CFG_Val 0x00050063 +#define PLL1_SETUP 1 +#define PLL1CFG_Val 0x00000023 +#define CCLKCFG_Val 0x00000003 +#define USBCLKCFG_Val 0x00000000 +#define PCLKSEL0_Val 0x00000000 +#define PCLKSEL1_Val 0x00000000 +#define PCONP_Val 0x042887DE +#define CLKOUTCFG_Val 0x00000000 + + +/*--------------------- Flash Accelerator Configuration ---------------------- +// +// Flash Accelerator Configuration +// FLASHTIM: Flash Access Time +// <0=> 1 CPU clock (for CPU clock up to 20 MHz) +// <1=> 2 CPU clocks (for CPU clock up to 40 MHz) +// <2=> 3 CPU clocks (for CPU clock up to 60 MHz) +// <3=> 4 CPU clocks (for CPU clock up to 80 MHz) +// <4=> 5 CPU clocks (for CPU clock up to 100 MHz) +// <5=> 6 CPU clocks (for any CPU clock) +// +*/ +#define FLASH_SETUP 1 +#define FLASHCFG_Val 0x00004000 + +/* +//-------- <<< end of configuration section >>> ------------------------------ +*/ + +/*---------------------------------------------------------------------------- + Check the register settings + *----------------------------------------------------------------------------*/ +#define CHECK_RANGE(val, min, max) ((val < min) || (val > max)) +#define CHECK_RSVD(val, mask) (val & mask) + +/* Clock Configuration -------------------------------------------------------*/ +#if (CHECK_RSVD((SCS_Val), ~0x00000030)) + #error "SCS: Invalid values of reserved bits!" +#endif + +#if (CHECK_RANGE((CLKSRCSEL_Val), 0, 2)) + #error "CLKSRCSEL: Value out of range!" +#endif + +#if (CHECK_RSVD((PLL0CFG_Val), ~0x00FF7FFF)) + #error "PLL0CFG: Invalid values of reserved bits!" +#endif + +#if (CHECK_RSVD((PLL1CFG_Val), ~0x0000007F)) + #error "PLL1CFG: Invalid values of reserved bits!" +#endif + +#if (PLL0_SETUP) /* if PLL0 is used */ + #if (CCLKCFG_Val < 2) /* CCLKSEL must be greater then 1 */ + #error "CCLKCFG: CCLKSEL must be greater then 1 if PLL0 is used!" + #endif +#endif + +#if (CHECK_RANGE((CCLKCFG_Val), 0, 255)) + #error "CCLKCFG: Value out of range!" +#endif + +#if (CHECK_RSVD((USBCLKCFG_Val), ~0x0000000F)) + #error "USBCLKCFG: Invalid values of reserved bits!" +#endif + +#if (CHECK_RSVD((PCLKSEL0_Val), 0x000C0C00)) + #error "PCLKSEL0: Invalid values of reserved bits!" +#endif + +#if (CHECK_RSVD((PCLKSEL1_Val), 0x03000300)) + #error "PCLKSEL1: Invalid values of reserved bits!" +#endif + +#if (CHECK_RSVD((PCONP_Val), 0x10100821)) + #error "PCONP: Invalid values of reserved bits!" +#endif + +#if (CHECK_RSVD((CLKOUTCFG_Val), ~0x000001FF)) + #error "CLKOUTCFG: Invalid values of reserved bits!" +#endif + +/* Flash Accelerator Configuration -------------------------------------------*/ +#if (CHECK_RSVD((FLASHCFG_Val), ~0x0000F000)) + #error "FLASHCFG: Invalid values of reserved bits!" +#endif + + +/*---------------------------------------------------------------------------- + DEFINES + *----------------------------------------------------------------------------*/ + +/*---------------------------------------------------------------------------- + Define clocks + *----------------------------------------------------------------------------*/ +#define XTAL (12000000UL) /* Oscillator frequency */ +#define OSC_CLK ( XTAL) /* Main oscillator frequency */ +#define RTC_CLK ( 32768UL) /* RTC oscillator frequency */ +#define IRC_OSC ( 4000000UL) /* Internal RC oscillator frequency */ + + +/* F_cco0 = (2 * M * F_in) / N */ +#define __M (((PLL0CFG_Val ) & 0x7FFF) + 1) +#define __N (((PLL0CFG_Val >> 16) & 0x00FF) + 1) +#define __FCCO(__F_IN) ((2ULL * __M * __F_IN) / __N) +#define __CCLK_DIV (((CCLKCFG_Val ) & 0x00FF) + 1) + +/* Determine core clock frequency according to settings */ + #if (PLL0_SETUP) + #if ((CLKSRCSEL_Val & 0x03) == 1) + #define __CORE_CLK (__FCCO(OSC_CLK) / __CCLK_DIV) + #elif ((CLKSRCSEL_Val & 0x03) == 2) + #define __CORE_CLK (__FCCO(RTC_CLK) / __CCLK_DIV) + #else + #define __CORE_CLK (__FCCO(IRC_OSC) / __CCLK_DIV) + #endif + #else + #if ((CLKSRCSEL_Val & 0x03) == 1) + #define __CORE_CLK (OSC_CLK / __CCLK_DIV) + #elif ((CLKSRCSEL_Val & 0x03) == 2) + #define __CORE_CLK (RTC_CLK / __CCLK_DIV) + #else + #define __CORE_CLK (IRC_OSC / __CCLK_DIV) + #endif + #endif + + + +/*---------------------------------------------------------------------------- + System Core Clock Variable + *----------------------------------------------------------------------------*/ +uint32_t SystemCoreClock = __CORE_CLK; + + +/*---------------------------------------------------------------------------- + SystemCoreClockUpdate + *----------------------------------------------------------------------------*/ +void SystemCoreClockUpdate (void) /* Get Core Clock Frequency */ +{ + /* Determine clock frequency according to clock register values */ + if (((LPC_SC->PLL0STAT >> 24) & 3) == 3) { /* If PLL0 enabled and connected */ + switch (LPC_SC->CLKSRCSEL & 0x03) { + case 0: /* Int. RC oscillator => PLL0 */ + case 3: /* Reserved, default to Int. RC */ + SystemCoreClock = (IRC_OSC * + ((2ULL * ((LPC_SC->PLL0STAT & 0x7FFF) + 1))) / + (((LPC_SC->PLL0STAT >> 16) & 0xFF) + 1) / + ((LPC_SC->CCLKCFG & 0xFF)+ 1)); + break; + case 1: /* Main oscillator => PLL0 */ + SystemCoreClock = (OSC_CLK * + ((2ULL * ((LPC_SC->PLL0STAT & 0x7FFF) + 1))) / + (((LPC_SC->PLL0STAT >> 16) & 0xFF) + 1) / + ((LPC_SC->CCLKCFG & 0xFF)+ 1)); + break; + case 2: /* RTC oscillator => PLL0 */ + SystemCoreClock = (RTC_CLK * + ((2ULL * ((LPC_SC->PLL0STAT & 0x7FFF) + 1))) / + (((LPC_SC->PLL0STAT >> 16) & 0xFF) + 1) / + ((LPC_SC->CCLKCFG & 0xFF)+ 1)); + break; + } + } else { + switch (LPC_SC->CLKSRCSEL & 0x03) { + case 0: /* Int. RC oscillator => PLL0 */ + case 3: /* Reserved, default to Int. RC */ + SystemCoreClock = IRC_OSC / ((LPC_SC->CCLKCFG & 0xFF)+ 1); + break; + case 1: /* Main oscillator => PLL0 */ + SystemCoreClock = OSC_CLK / ((LPC_SC->CCLKCFG & 0xFF)+ 1); + break; + case 2: /* RTC oscillator => PLL0 */ + SystemCoreClock = RTC_CLK / ((LPC_SC->CCLKCFG & 0xFF)+ 1); + break; + } + } + +} + +/*---------------------------------------------------------------------------- + SystemInit + *----------------------------------------------------------------------------*/ +void SystemInit (void) +{ +#if (CLOCK_SETUP) /* Clock Setup */ + LPC_SC->SCS = SCS_Val; + if (LPC_SC->SCS & (1 << 5)) { /* If Main Oscillator is enabled */ + while ((LPC_SC->SCS & (1<<6)) == 0);/* Wait for Oscillator to be ready */ + } + + LPC_SC->CCLKCFG = CCLKCFG_Val; /* Setup Clock Divider */ + /* Periphral clock must be selected before PLL0 enabling and connecting + * - according errata.lpc1768-16.March.2010 - + */ + LPC_SC->PCLKSEL0 = PCLKSEL0_Val; /* Peripheral Clock Selection */ + LPC_SC->PCLKSEL1 = PCLKSEL1_Val; + + LPC_SC->CLKSRCSEL = CLKSRCSEL_Val; /* Select Clock Source sysclk / PLL0 */ + +#if (PLL0_SETUP) + LPC_SC->PLL0CFG = PLL0CFG_Val; /* configure PLL0 */ + LPC_SC->PLL0FEED = 0xAA; + LPC_SC->PLL0FEED = 0x55; + + LPC_SC->PLL0CON = 0x01; /* PLL0 Enable */ + LPC_SC->PLL0FEED = 0xAA; + LPC_SC->PLL0FEED = 0x55; + while (!(LPC_SC->PLL0STAT & (1<<26)));/* Wait for PLOCK0 */ + + LPC_SC->PLL0CON = 0x03; /* PLL0 Enable & Connect */ + LPC_SC->PLL0FEED = 0xAA; + LPC_SC->PLL0FEED = 0x55; + while ((LPC_SC->PLL0STAT & ((1<<25) | (1<<24))) != ((1<<25) | (1<<24))); /* Wait for PLLC0_STAT & PLLE0_STAT */ +#endif + +#if (PLL1_SETUP) + LPC_SC->PLL1CFG = PLL1CFG_Val; + LPC_SC->PLL1FEED = 0xAA; + LPC_SC->PLL1FEED = 0x55; + + LPC_SC->PLL1CON = 0x01; /* PLL1 Enable */ + LPC_SC->PLL1FEED = 0xAA; + LPC_SC->PLL1FEED = 0x55; + while (!(LPC_SC->PLL1STAT & (1<<10)));/* Wait for PLOCK1 */ + + LPC_SC->PLL1CON = 0x03; /* PLL1 Enable & Connect */ + LPC_SC->PLL1FEED = 0xAA; + LPC_SC->PLL1FEED = 0x55; + while ((LPC_SC->PLL1STAT & ((1<< 9) | (1<< 8))) != ((1<< 9) | (1<< 8))); /* Wait for PLLC1_STAT & PLLE1_STAT */ +#else + LPC_SC->USBCLKCFG = USBCLKCFG_Val; /* Setup USB Clock Divider */ +#endif + + LPC_SC->PCONP = PCONP_Val; /* Power Control for Peripherals */ + + LPC_SC->CLKOUTCFG = CLKOUTCFG_Val; /* Clock Output Configuration */ +#endif + +#if (FLASH_SETUP == 1) /* Flash Accelerator Setup */ + LPC_SC->FLASHCFG = (LPC_SC->FLASHCFG & ~0x0000F000) | FLASHCFG_Val; +#endif +} diff --git a/F2024/coe718/labs/lab2/RTE/_Target_1/RTE_Components.h b/F2024/coe718/labs/lab2/RTE/_Target_1/RTE_Components.h new file mode 100755 index 0000000..63ad118 --- /dev/null +++ b/F2024/coe718/labs/lab2/RTE/_Target_1/RTE_Components.h @@ -0,0 +1,26 @@ + +/* + * Auto generated Run-Time-Environment Configuration File + * *** Do not modify ! *** + * + * Project: 'bitband' + * Target: 'Target 1' + */ + +#ifndef RTE_COMPONENTS_H +#define RTE_COMPONENTS_H + + +/* + * Define the Device Header File: + */ +#define CMSIS_device_header "LPC17xx.h" + +/* Keil.ARM Compiler::Compiler:Event Recorder:DAP:1.4.0 */ +#define RTE_Compiler_EventRecorder + #define RTE_Compiler_EventRecorder_DAP +/* Keil::Device:Startup:1.0.0 */ +#define RTE_DEVICE_STARTUP_LPC17XX /* Device Startup for NXP17XX */ + + +#endif /* RTE_COMPONENTS_H */ diff --git a/F2024/coe718/labs/lab2/bitband.uvguix.ECBME b/F2024/coe718/labs/lab2/bitband.uvguix.ECBME new file mode 100755 index 0000000..e1441e5 --- /dev/null +++ b/F2024/coe718/labs/lab2/bitband.uvguix.ECBME @@ -0,0 +1,3646 @@ + + + + -6.1 + +
    ### uVision Project, (C) Keil Software
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+ + + + 0 + 1918 + 936 + + + + + + 1 + 0 + + 100 + 0 + + .\bitbanding\bitband.c + 40 + 23 + 36 + 1 + + 0 + + + S:\documents\coe\718\labs\lab1\Boards\Keil\MCB1700\Blinky_ULp\Blinky.c + 0 + 1 + 19 + 1 + + 0 + + + S:\documents\coe\718\labs\lab2\Barrel_shifting\Barrel_shifting.c + 0 + 1 + 1 + 1 + + 0 + + + RTE\Device\LPC1768\startup_LPC17xx.s + 0 + 122 + 129 + 1 + + 0 + + + + +     diff --git a/F2024/coe718/labs/lab2/bitband.uvoptx b/F2024/coe718/labs/lab2/bitband.uvoptx new file mode 100755 index 0000000..22ab06d --- /dev/null +++ b/F2024/coe718/labs/lab2/bitband.uvoptx @@ -0,0 +1,311 @@ + + + + 1.0 + +
    ### uVision Project, (C) Keil Software
    + + + *.c + *.s*; *.src; *.a* + *.obj; *.o + *.lib + *.txt; *.h; *.inc + *.plm + *.cpp + 0 + + + + 0 + 0 + + + + Target 1 + 0x4 + ARM-ADS + + 12000000 + + 1 + 1 + 0 + 1 + 0 + + + 1 + 65535 + 0 + 0 + 0 + + + 79 + 66 + 8 + .\Listings\ + + + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 1 + 0 + 0 + 0 + 0 + + + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + + + 1 + 0 + 1 + + 8 + + 1 + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 1 + 1 + 1 + 0 + 0 + 1 + 0 + 0 + 0 + + + + + + + + + + + BIN\UL2CM3.DLL + + + + 0 + ARMRTXEVENTFLAGS + -L70 -Z18 -C0 -M0 -T1 + + + 0 + DLGDARM + (1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=-1,-1,-1,-1,0)(1012=-1,-1,-1,-1,0)(350=-1,-1,-1,-1,0)(250=-1,-1,-1,-1,0)(270=-1,-1,-1,-1,0)(313=-1,-1,-1,-1,0)(291=-1,-1,-1,-1,0)(302=-1,-1,-1,-1,0)(110=-1,-1,-1,-1,0)(113=-1,-1,-1,-1,0)(320=-1,-1,-1,-1,0)(210=-1,-1,-1,-1,0)(330=-1,-1,-1,-1,0)(332=-1,-1,-1,-1,0)(333=-1,-1,-1,-1,0)(334=-1,-1,-1,-1,0)(335=-1,-1,-1,-1,0)(336=-1,-1,-1,-1,0)(345=-1,-1,-1,-1,0)(346=-1,-1,-1,-1,0)(381=-1,-1,-1,-1,0)(382=-1,-1,-1,-1,0)(383=-1,-1,-1,-1,0)(384=-1,-1,-1,-1,0)(197=-1,-1,-1,-1,0)(198=-1,-1,-1,-1,0)(191=-1,-1,-1,-1,0)(192=-1,-1,-1,-1,0)(199=-1,-1,-1,-1,0)(180=-1,-1,-1,-1,0)(261=-1,-1,-1,-1,0)(262=-1,-1,-1,-1,0)(231=-1,-1,-1,-1,0)(232=-1,-1,-1,-1,0)(233=-1,-1,-1,-1,0)(121=-1,-1,-1,-1,0)(122=-1,-1,-1,-1,0)(123=-1,-1,-1,-1,0)(124=-1,-1,-1,-1,0)(170=-1,-1,-1,-1,0)(142=-1,-1,-1,-1,0)(150=-1,-1,-1,-1,0)(400=-1,-1,-1,-1,0)(370=-1,-1,-1,-1,0)(160=-1,-1,-1,-1,0)(280=-1,-1,-1,-1,0)(240=-1,-1,-1,-1,0) + + + 0 + ARMDBGFLAGS + -T0 + + + 0 + UL2CM3 + -UAny -O206 -S8 -C0 -P00 -N00("") -D00(00000000) -L00(0) -TO65554 -TC10000000 -TT10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO15 -FD10000000 -FCFE0 -FN1 -FF0LPC_IAP_512.FLM -FS00 -FL080000 -FP0($$Device:LPC1768$Flash\LPC_IAP_512.FLM) + + + + + C:\Users\ECBME\AppData\Local\Arm\Packs\Keil\ARM_Compiler\1.6.3\EventRecorder.scvd + Keil.ARM_Compiler.1.6.3 + 1 + + + 0 + + + 0 + 1 + 1 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + + + + 0 + 0 + 0 + + + + + + + + + + 1 + 1 + 0 + 2 + 10000000 + + + + + + Source Group 1 + 1 + 0 + 0 + 0 + + 1 + 1 + 1 + 0 + 0 + 0 + .\bitbanding\bitband.c + bitband.c + 0 + 0 + + + 1 + 2 + 5 + 0 + 0 + 0 + .\bitbanding\bitband.h + bitband.h + 0 + 0 + + + 1 + 3 + 1 + 0 + 0 + 0 + ..\lab1\Boards\Keil\MCB1700\Blinky_ULp\GLCD_SPI_LPC1700.c + GLCD_SPI_LPC1700.c + 0 + 0 + + + 1 + 4 + 5 + 0 + 0 + 0 + ..\lab1\Boards\Keil\MCB1700\Blinky_ULp\Font_6x8_h.h + Font_6x8_h.h + 0 + 0 + + + 1 + 5 + 5 + 0 + 0 + 0 + ..\lab1\Boards\Keil\MCB1700\Blinky_ULp\Font_16x24_h.h + Font_16x24_h.h + 0 + 0 + + + 1 + 6 + 5 + 0 + 0 + 0 + ..\lab1\Boards\Keil\MCB1700\Blinky_ULp\GLCD.h + GLCD.h + 0 + 0 + + + + + ::Board Support + 1 + 0 + 0 + 1 + + + + ::CMSIS + 0 + 0 + 0 + 1 + + + + ::Compiler + 0 + 0 + 0 + 1 + + + + ::Device + 0 + 0 + 0 + 1 + + +     diff --git a/F2024/coe718/labs/lab2/bitband.uvprojx b/F2024/coe718/labs/lab2/bitband.uvprojx new file mode 100755 index 0000000..108bbc7 --- /dev/null +++ b/F2024/coe718/labs/lab2/bitband.uvprojx @@ -0,0 +1,532 @@ + + + + 2.1 + +
    ### uVision Project, (C) Keil Software
    + + + + Target 1 + 0x4 + ARM-ADS + 5060750::V5.06 update 6 (build 750)::.\ARMCC + 0 + + + LPC1768 + NXP + Keil.LPC1700_DFP.2.6.0 + http://www.keil.com/pack/ + IRAM(0x10000000,0x8000) IRAM2(0x2007C000,0x8000) IROM(0x00000000,0x80000) CPUTYPE("Cortex-M3") CLOCK(12000000) ELITTLE + + + UL2CM3(-S0 -C0 -P0 -FD10000000 -FCFE0 -FN1 -FF0LPC_IAP_512 -FS00 -FL080000 -FP0($$Device:LPC1768$Flash\LPC_IAP_512.FLM)) + 4868 + $$Device:LPC1768$Device\Include\LPC17xx.h + + + + + + + + + + $$Device:LPC1768$SVD\LPC176x5x.svd + 0 + 0 + + + + + + + 0 + 0 + 0 + 0 + 1 + + .\Objects\ + bitband + 1 + 0 + 0 + 1 + 1 + .\Listings\ + 1 + 0 + 0 + + 0 + 0 + + + 0 + 0 + 0 + 0 + + + 0 + 0 + + + 0 + 0 + 0 + 0 + + + 0 + 0 + + + 0 + 0 + 0 + 0 + + 0 + + + + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 3 + + + 1 + + + SARMCM3.DLL + -MPU + DARMP1.DLL + -pLPC1768 + SARMCM3.DLL + -MPU + TARMP1.DLL + -pLPC1768 + + + + 1 + 0 + 0 + 0 + 16 + + + + + 1 + 0 + 0 + 1 + 1 + -1 + + 1 + BIN\UL2CM3.DLL + + + + + + 0 + + + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 1 + 1 + 0 + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + "Cortex-M3" + + 0 + 0 + 0 + 1 + 1 + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 8 + 0 + 0 + 0 + 0 + 3 + 4 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 1 + 0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x10000000 + 0x8000 + + + 1 + 0x0 + 0x80000 + + + 0 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x80000 + + + 1 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x10000000 + 0x8000 + + + 0 + 0x2007c000 + 0x8000 + + + + + + 1 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 0 + 2 + 0 + 0 + 1 + 1 + 0 + 3 + 3 + 1 + 1 + 0 + 0 + 0 + + + + + + + + + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 1 + + + + + + + + + 1 + 0 + 0 + 0 + 1 + 0 + 0x00000000 + 0x10000000 + + + + + + + + + + + + + Source Group 1 + + + bitband.c + 1 + .\bitbanding\bitband.c + + + bitband.h + 5 + .\bitbanding\bitband.h + + + GLCD_SPI_LPC1700.c + 1 + ..\lab1\Boards\Keil\MCB1700\Blinky_ULp\GLCD_SPI_LPC1700.c + + + Font_6x8_h.h + 5 + ..\lab1\Boards\Keil\MCB1700\Blinky_ULp\Font_6x8_h.h + + + Font_16x24_h.h + 5 + ..\lab1\Boards\Keil\MCB1700\Blinky_ULp\Font_16x24_h.h + + + GLCD.h + 5 + ..\lab1\Boards\Keil\MCB1700\Blinky_ULp\GLCD.h + + + + + ::Board Support + + + ::CMSIS + + + ::Compiler + + + ::Device + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + RTE\Compiler\EventRecorderConf.h + + + + + + + + RTE\Device\LPC1768\RTE_Device.h + + + + + + + + RTE\Device\LPC1768\startup_LPC17xx.s + + + + + + + + RTE\Device\LPC1768\system_LPC17xx.c + + + + + + + + + + + + + <Project Info> + + + + + + 0 + 1 + + + + +     diff --git a/F2024/coe718/labs/lab2/bitbanding/Font_16x24_h.h b/F2024/coe718/labs/lab2/bitbanding/Font_16x24_h.h new file mode 100755 index 0000000..b3a4a22 --- /dev/null +++ b/F2024/coe718/labs/lab2/bitbanding/Font_16x24_h.h @@ -0,0 +1,472 @@ +/*---------------------------------------------------------------------------- + * Name: Font_16x24_h.h + * Purpose: ASCII font characters (width 16 pixels, height 24 pixels, + * horizontal pixel packing) + *---------------------------------------------------------------------------- + * This file is part of the uVision/ARM development tools. + * This software may only be used under the terms of a valid, current, + * end user licence from KEIL for a compatible version of KEIL software + * development tools. Nothing else gives you the right to use this software. + * + * This software is supplied "AS IS" without warranties of any kind. + * + * Copyright (c) 2010 Keil - An ARM Company. All rights reserved. + *----------------------------------------------------------------------------*/ + +#ifndef __FONT_16x24_H_H +#define __FONT_16x24_H_H + +const unsigned short Font_16x24_h[] = { + /* 0x20: Space ' ' */ + 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, + 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, + 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, + /* 0x21: '!' */ + 0x0000, 0x0180, 0x0180, 0x0180, 0x0180, 0x0180, 0x0180, 0x0180, + 0x0180, 0x0180, 0x0180, 0x0180, 0x0180, 0x0180, 0x0000, 0x0000, + 0x0180, 0x0180, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, + /* 0x22: '"' */ + 0x0000, 0x0000, 0x00CC, 0x00CC, 0x00CC, 0x00CC, 0x00CC, 0x00CC, + 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, + 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, + /* 0x23: '#' */ + 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0C60, 0x0C60, + 0x0C60, 0x0630, 0x0630, 0x1FFE, 0x1FFE, 0x0630, 0x0738, 0x0318, + 0x1FFE, 0x1FFE, 0x0318, 0x0318, 0x018C, 0x018C, 0x018C, 0x0000, + /* 0x24: '$' */ + 0x0000, 0x0080, 0x03E0, 0x0FF8, 0x0E9C, 0x1C8C, 0x188C, 0x008C, + 0x0098, 0x01F8, 0x07E0, 0x0E80, 0x1C80, 0x188C, 0x188C, 0x189C, + 0x0CB8, 0x0FF0, 0x03E0, 0x0080, 0x0080, 0x0000, 0x0000, 0x0000, + /* 0x25: '%' */ + 0x0000, 0x0000, 0x0000, 0x180E, 0x0C1B, 0x0C11, 0x0611, 0x0611, + 0x0311, 0x0311, 0x019B, 0x018E, 0x38C0, 0x6CC0, 0x4460, 0x4460, + 0x4430, 0x4430, 0x4418, 0x6C18, 0x380C, 0x0000, 0x0000, 0x0000, + /* 0x26: '&' */ + 0x0000, 0x01E0, 0x03F0, 0x0738, 0x0618, 0x0618, 0x0330, 0x01F0, + 0x00F0, 0x00F8, 0x319C, 0x330E, 0x1E06, 0x1C06, 0x1C06, 0x3F06, + 0x73FC, 0x21F0, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, + /* 0x27: ''' */ + 0x0000, 0x0000, 0x000C, 0x000C, 0x000C, 0x000C, 0x000C, 0x000C, + 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, + 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, + /* 0x28: '(' */ + 0x0000, 0x0200, 0x0300, 0x0180, 0x00C0, 0x00C0, 0x0060, 0x0060, + 0x0030, 0x0030, 0x0030, 0x0030, 0x0030, 0x0030, 0x0030, 0x0030, + 0x0060, 0x0060, 0x00C0, 0x00C0, 0x0180, 0x0300, 0x0200, 0x0000, + /* 0x29: ')' */ + 0x0000, 0x0020, 0x0060, 0x00C0, 0x0180, 0x0180, 0x0300, 0x0300, + 0x0600, 0x0600, 0x0600, 0x0600, 0x0600, 0x0600, 0x0600, 0x0600, + 0x0300, 0x0300, 0x0180, 0x0180, 0x00C0, 0x0060, 0x0020, 0x0000, + /* 0x2A: '*' */ + 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x00C0, 0x00C0, + 0x06D8, 0x07F8, 0x01E0, 0x0330, 0x0738, 0x0000, 0x0000, 0x0000, + 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, + /* 0x2B: '+' */ + 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0180, 0x0180, + 0x0180, 0x0180, 0x0180, 0x3FFC, 0x3FFC, 0x0180, 0x0180, 0x0180, + 0x0180, 0x0180, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, + /* 0x2C: ',' */ + 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, + 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, + 0x0000, 0x0180, 0x0180, 0x0100, 0x0100, 0x0080, 0x0000, 0x0000, + /* 0x2D: '-' */ + 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, + 0x0000, 0x0000, 0x0000, 0x0000, 0x07E0, 0x07E0, 0x0000, 0x0000, + 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, + /* 0x2E: '.' */ + 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, + 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, + 0x0000, 0x00C0, 0x00C0, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, + /* 0x2F: '/' */ + 0x0000, 0x0C00, 0x0C00, 0x0600, 0x0600, 0x0600, 0x0300, 0x0300, + 0x0300, 0x0380, 0x0180, 0x0180, 0x0180, 0x00C0, 0x00C0, 0x00C0, + 0x0060, 0x0060, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, + /* 0x30: '0' */ + 0x0000, 0x03E0, 0x07F0, 0x0E38, 0x0C18, 0x180C, 0x180C, 0x180C, + 0x180C, 0x180C, 0x180C, 0x180C, 0x180C, 0x180C, 0x0C18, 0x0E38, + 0x07F0, 0x03E0, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, + /* 0x31: '1' */ + 0x0000, 0x0100, 0x0180, 0x01C0, 0x01F0, 0x0198, 0x0188, 0x0180, + 0x0180, 0x0180, 0x0180, 0x0180, 0x0180, 0x0180, 0x0180, 0x0180, + 0x0180, 0x0180, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, + /* 0x32: '2' */ + 0x0000, 0x03E0, 0x0FF8, 0x0C18, 0x180C, 0x180C, 0x1800, 0x1800, + 0x0C00, 0x0600, 0x0300, 0x0180, 0x00C0, 0x0060, 0x0030, 0x0018, + 0x1FFC, 0x1FFC, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, + /* 0x33: '3' */ + 0x0000, 0x01E0, 0x07F8, 0x0E18, 0x0C0C, 0x0C0C, 0x0C00, 0x0600, + 0x03C0, 0x07C0, 0x0C00, 0x1800, 0x1800, 0x180C, 0x180C, 0x0C18, + 0x07F8, 0x03E0, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, + /* 0x34: '4' */ + 0x0000, 0x0C00, 0x0E00, 0x0F00, 0x0F00, 0x0D80, 0x0CC0, 0x0C60, + 0x0C60, 0x0C30, 0x0C18, 0x0C0C, 0x3FFC, 0x3FFC, 0x0C00, 0x0C00, + 0x0C00, 0x0C00, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, + /* 0x35: '5' */ + 0x0000, 0x0FF8, 0x0FF8, 0x0018, 0x0018, 0x000C, 0x03EC, 0x07FC, + 0x0E1C, 0x1C00, 0x1800, 0x1800, 0x1800, 0x180C, 0x0C1C, 0x0E18, + 0x07F8, 0x03E0, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, + /* 0x36: '6' */ + 0x0000, 0x07C0, 0x0FF0, 0x1C38, 0x1818, 0x0018, 0x000C, 0x03CC, + 0x0FEC, 0x0E3C, 0x1C1C, 0x180C, 0x180C, 0x180C, 0x1C18, 0x0E38, + 0x07F0, 0x03E0, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, + /* 0x37: '7' */ + 0x0000, 0x1FFC, 0x1FFC, 0x0C00, 0x0600, 0x0600, 0x0300, 0x0380, + 0x0180, 0x01C0, 0x00C0, 0x00E0, 0x0060, 0x0060, 0x0070, 0x0030, + 0x0030, 0x0030, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, + /* 0x38: '8' */ + 0x0000, 0x03E0, 0x07F0, 0x0E38, 0x0C18, 0x0C18, 0x0C18, 0x0638, + 0x07F0, 0x07F0, 0x0C18, 0x180C, 0x180C, 0x180C, 0x180C, 0x0C38, + 0x0FF8, 0x03E0, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, + /* 0x39: '9' */ + 0x0000, 0x03E0, 0x07F0, 0x0E38, 0x0C1C, 0x180C, 0x180C, 0x180C, + 0x1C1C, 0x1E38, 0x1BF8, 0x19E0, 0x1800, 0x0C00, 0x0C00, 0x0E1C, + 0x07F8, 0x01F0, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, + /* 0x3A: ':' */ + 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0180, 0x0180, + 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, + 0x0180, 0x0180, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, + /* 0x3B: ';' */ + 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0180, 0x0180, + 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, + 0x0180, 0x0180, 0x0100, 0x0100, 0x0080, 0x0000, 0x0000, 0x0000, + /* 0x3C: '<' */ + 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, + 0x1000, 0x1C00, 0x0F80, 0x03E0, 0x00F8, 0x0018, 0x00F8, 0x03E0, + 0x0F80, 0x1C00, 0x1000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, + /* 0x3D: '=' */ + 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, + 0x1FF8, 0x0000, 0x0000, 0x0000, 0x1FF8, 0x0000, 0x0000, 0x0000, + 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, + /* 0x3E: '>' */ + 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, + 0x0008, 0x0038, 0x01F0, 0x07C0, 0x1F00, 0x1800, 0x1F00, 0x07C0, + 0x01F0, 0x0038, 0x0008, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, + /* 0x3F: '?' */ + 0x0000, 0x03E0, 0x0FF8, 0x0C18, 0x180C, 0x180C, 0x1800, 0x0C00, + 0x0600, 0x0300, 0x0180, 0x00C0, 0x00C0, 0x00C0, 0x0000, 0x0000, + 0x00C0, 0x00C0, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, + /* 0x40: '@' */ + 0x0000, 0x0000, 0x07E0, 0x1818, 0x2004, 0x29C2, 0x4A22, 0x4411, + 0x4409, 0x4409, 0x4409, 0x2209, 0x1311, 0x0CE2, 0x4002, 0x2004, + 0x1818, 0x07E0, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, + /* 0x41: 'A' */ + 0x0000, 0x0380, 0x0380, 0x06C0, 0x06C0, 0x06C0, 0x0C60, 0x0C60, + 0x1830, 0x1830, 0x1830, 0x3FF8, 0x3FF8, 0x701C, 0x600C, 0x600C, + 0xC006, 0xC006, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, + /* 0x42: 'B' */ + 0x0000, 0x03FC, 0x0FFC, 0x0C0C, 0x180C, 0x180C, 0x180C, 0x0C0C, + 0x07FC, 0x0FFC, 0x180C, 0x300C, 0x300C, 0x300C, 0x300C, 0x180C, + 0x1FFC, 0x07FC, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, + /* 0x43: 'C' */ + 0x0000, 0x07C0, 0x1FF0, 0x3838, 0x301C, 0x700C, 0x6006, 0x0006, + 0x0006, 0x0006, 0x0006, 0x0006, 0x0006, 0x6006, 0x700C, 0x301C, + 0x1FF0, 0x07E0, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, + /* 0x44: 'D' */ + 0x0000, 0x03FE, 0x0FFE, 0x0E06, 0x1806, 0x1806, 0x3006, 0x3006, + 0x3006, 0x3006, 0x3006, 0x3006, 0x3006, 0x1806, 0x1806, 0x0E06, + 0x0FFE, 0x03FE, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, + /* 0x45: 'E' */ + 0x0000, 0x3FFC, 0x3FFC, 0x000C, 0x000C, 0x000C, 0x000C, 0x000C, + 0x1FFC, 0x1FFC, 0x000C, 0x000C, 0x000C, 0x000C, 0x000C, 0x000C, + 0x3FFC, 0x3FFC, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, + /* 0x46: 'F' */ + 0x0000, 0x3FF8, 0x3FF8, 0x0018, 0x0018, 0x0018, 0x0018, 0x0018, + 0x1FF8, 0x1FF8, 0x0018, 0x0018, 0x0018, 0x0018, 0x0018, 0x0018, + 0x0018, 0x0018, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, + /* 0x47: 'G' */ + 0x0000, 0x0FE0, 0x3FF8, 0x783C, 0x600E, 0xE006, 0xC007, 0x0003, + 0x0003, 0xFE03, 0xFE03, 0xC003, 0xC007, 0xC006, 0xC00E, 0xF03C, + 0x3FF8, 0x0FE0, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, + /* 0x48: 'H' */ + 0x0000, 0x300C, 0x300C, 0x300C, 0x300C, 0x300C, 0x300C, 0x300C, + 0x3FFC, 0x3FFC, 0x300C, 0x300C, 0x300C, 0x300C, 0x300C, 0x300C, + 0x300C, 0x300C, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, + /* 0x49: 'I' */ + 0x0000, 0x0180, 0x0180, 0x0180, 0x0180, 0x0180, 0x0180, 0x0180, + 0x0180, 0x0180, 0x0180, 0x0180, 0x0180, 0x0180, 0x0180, 0x0180, + 0x0180, 0x0180, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, + /* 0x4A: 'J' */ + 0x0000, 0x0600, 0x0600, 0x0600, 0x0600, 0x0600, 0x0600, 0x0600, + 0x0600, 0x0600, 0x0600, 0x0600, 0x0600, 0x0618, 0x0618, 0x0738, + 0x03F0, 0x01E0, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, + /* 0x4B: 'K' */ + 0x0000, 0x3006, 0x1806, 0x0C06, 0x0606, 0x0306, 0x0186, 0x00C6, + 0x0066, 0x0076, 0x00DE, 0x018E, 0x0306, 0x0606, 0x0C06, 0x1806, + 0x3006, 0x6006, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, + /* 0x4C: 'L' */ + 0x0000, 0x0018, 0x0018, 0x0018, 0x0018, 0x0018, 0x0018, 0x0018, + 0x0018, 0x0018, 0x0018, 0x0018, 0x0018, 0x0018, 0x0018, 0x0018, + 0x1FF8, 0x1FF8, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, + /* 0x4D: 'M' */ + 0x0000, 0xE00E, 0xF01E, 0xF01E, 0xF01E, 0xD836, 0xD836, 0xD836, + 0xD836, 0xCC66, 0xCC66, 0xCC66, 0xC6C6, 0xC6C6, 0xC6C6, 0xC6C6, + 0xC386, 0xC386, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, + /* 0x4E: 'N' */ + 0x0000, 0x300C, 0x301C, 0x303C, 0x303C, 0x306C, 0x306C, 0x30CC, + 0x30CC, 0x318C, 0x330C, 0x330C, 0x360C, 0x360C, 0x3C0C, 0x3C0C, + 0x380C, 0x300C, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, + /* 0x4F: 'O' */ + 0x0000, 0x07E0, 0x1FF8, 0x381C, 0x700E, 0x6006, 0xC003, 0xC003, + 0xC003, 0xC003, 0xC003, 0xC003, 0xC003, 0x6006, 0x700E, 0x381C, + 0x1FF8, 0x07E0, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, + /* 0x50: 'P' */ + 0x0000, 0x0FFC, 0x1FFC, 0x380C, 0x300C, 0x300C, 0x300C, 0x300C, + 0x180C, 0x1FFC, 0x07FC, 0x000C, 0x000C, 0x000C, 0x000C, 0x000C, + 0x000C, 0x000C, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, + /* 0x51: 'Q' */ + 0x0000, 0x07E0, 0x1FF8, 0x381C, 0x700E, 0x6006, 0xE003, 0xC003, + 0xC003, 0xC003, 0xC003, 0xC003, 0xE007, 0x6306, 0x3F0E, 0x3C1C, + 0x3FF8, 0xF7E0, 0xC000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, + /* 0x52: 'R' */ + 0x0000, 0x0FFE, 0x1FFE, 0x3806, 0x3006, 0x3006, 0x3006, 0x3806, + 0x1FFE, 0x07FE, 0x0306, 0x0606, 0x0C06, 0x1806, 0x1806, 0x3006, + 0x3006, 0x6006, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, + /* 0x53: 'S' */ + 0x0000, 0x03E0, 0x0FF8, 0x0C1C, 0x180C, 0x180C, 0x000C, 0x001C, + 0x03F8, 0x0FE0, 0x1E00, 0x3800, 0x3006, 0x3006, 0x300E, 0x1C1C, + 0x0FF8, 0x07E0, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, + /* 0x54: 'T' */ + 0x0000, 0x7FFE, 0x7FFE, 0x0180, 0x0180, 0x0180, 0x0180, 0x0180, + 0x0180, 0x0180, 0x0180, 0x0180, 0x0180, 0x0180, 0x0180, 0x0180, + 0x0180, 0x0180, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, + /* 0x55: 'U' */ + 0x0000, 0x300C, 0x300C, 0x300C, 0x300C, 0x300C, 0x300C, 0x300C, + 0x300C, 0x300C, 0x300C, 0x300C, 0x300C, 0x300C, 0x300C, 0x1818, + 0x1FF8, 0x07E0, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, + /* 0x56: 'V' */ + 0x0000, 0x6003, 0x3006, 0x3006, 0x3006, 0x180C, 0x180C, 0x180C, + 0x0C18, 0x0C18, 0x0E38, 0x0630, 0x0630, 0x0770, 0x0360, 0x0360, + 0x01C0, 0x01C0, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, + /* 0x57: 'W' */ + 0x0000, 0x6003, 0x61C3, 0x61C3, 0x61C3, 0x3366, 0x3366, 0x3366, + 0x3366, 0x3366, 0x3366, 0x1B6C, 0x1B6C, 0x1B6C, 0x1A2C, 0x1E3C, + 0x0E38, 0x0E38, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, + /* 0x58: 'X' */ + 0x0000, 0xE00F, 0x700C, 0x3018, 0x1830, 0x0C70, 0x0E60, 0x07C0, + 0x0380, 0x0380, 0x03C0, 0x06E0, 0x0C70, 0x1C30, 0x1818, 0x300C, + 0x600E, 0xE007, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, + /* 0x59: 'Y' */ + 0x0000, 0xC003, 0x6006, 0x300C, 0x381C, 0x1838, 0x0C30, 0x0660, + 0x07E0, 0x03C0, 0x0180, 0x0180, 0x0180, 0x0180, 0x0180, 0x0180, + 0x0180, 0x0180, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, + /* 0x5A: 'Z' */ + 0x0000, 0x7FFC, 0x7FFC, 0x6000, 0x3000, 0x1800, 0x0C00, 0x0600, + 0x0300, 0x0180, 0x00C0, 0x0060, 0x0030, 0x0018, 0x000C, 0x0006, + 0x7FFE, 0x7FFE, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, + /* 0x5B: '[' */ + 0x0000, 0x03E0, 0x03E0, 0x0060, 0x0060, 0x0060, 0x0060, 0x0060, + 0x0060, 0x0060, 0x0060, 0x0060, 0x0060, 0x0060, 0x0060, 0x0060, + 0x0060, 0x0060, 0x0060, 0x0060, 0x0060, 0x03E0, 0x03E0, 0x0000, + /* 0x5C: '\' */ + 0x0000, 0x0030, 0x0030, 0x0060, 0x0060, 0x0060, 0x00C0, 0x00C0, + 0x00C0, 0x01C0, 0x0180, 0x0180, 0x0180, 0x0300, 0x0300, 0x0300, + 0x0600, 0x0600, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, + /* 0x5D: ']' */ + 0x0000, 0x03E0, 0x03E0, 0x0300, 0x0300, 0x0300, 0x0300, 0x0300, + 0x0300, 0x0300, 0x0300, 0x0300, 0x0300, 0x0300, 0x0300, 0x0300, + 0x0300, 0x0300, 0x0300, 0x0300, 0x0300, 0x03E0, 0x03E0, 0x0000, + /* 0x5E: '^' */ + 0x0000, 0x0000, 0x01C0, 0x01C0, 0x0360, 0x0360, 0x0360, 0x0630, + 0x0630, 0x0C18, 0x0C18, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, + 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, + /* 0x5F: '_' */ + 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, + 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, + 0x0000, 0xFFFF, 0xFFFF, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, + /* 0x60: ''' */ + 0x0000, 0x000C, 0x000C, 0x000C, 0x000C, 0x000C, 0x000C, 0x0000, + 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, + 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, + /* 0x61: 'a' */ + 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x03F0, 0x07F8, + 0x0C1C, 0x0C0C, 0x0F00, 0x0FF0, 0x0CF8, 0x0C0C, 0x0C0C, 0x0F1C, + 0x0FF8, 0x18F0, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, + /* 0x62: 'b' */ + 0x0000, 0x0018, 0x0018, 0x0018, 0x0018, 0x0018, 0x03D8, 0x0FF8, + 0x0C38, 0x1818, 0x1818, 0x1818, 0x1818, 0x1818, 0x1818, 0x0C38, + 0x0FF8, 0x03D8, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, + /* 0x63: 'c' */ + 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x03C0, 0x07F0, + 0x0E30, 0x0C18, 0x0018, 0x0018, 0x0018, 0x0018, 0x0C18, 0x0E30, + 0x07F0, 0x03C0, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, + /* 0x64: 'd' */ + 0x0000, 0x1800, 0x1800, 0x1800, 0x1800, 0x1800, 0x1BC0, 0x1FF0, + 0x1C30, 0x1818, 0x1818, 0x1818, 0x1818, 0x1818, 0x1818, 0x1C30, + 0x1FF0, 0x1BC0, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, + /* 0x65: 'e' */ + 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x03C0, 0x0FF0, + 0x0C30, 0x1818, 0x1FF8, 0x1FF8, 0x0018, 0x0018, 0x1838, 0x1C30, + 0x0FF0, 0x07C0, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, + /* 0x66: 'f' */ + 0x0000, 0x0F80, 0x0FC0, 0x00C0, 0x00C0, 0x00C0, 0x07F0, 0x07F0, + 0x00C0, 0x00C0, 0x00C0, 0x00C0, 0x00C0, 0x00C0, 0x00C0, 0x00C0, + 0x00C0, 0x00C0, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, + /* 0x67: 'g' */ + 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0DE0, 0x0FF8, + 0x0E18, 0x0C0C, 0x0C0C, 0x0C0C, 0x0C0C, 0x0C0C, 0x0C0C, 0x0E18, + 0x0FF8, 0x0DE0, 0x0C00, 0x0C0C, 0x061C, 0x07F8, 0x01F0, 0x0000, + /* 0x68: 'h' */ + 0x0000, 0x0018, 0x0018, 0x0018, 0x0018, 0x0018, 0x07D8, 0x0FF8, + 0x1C38, 0x1818, 0x1818, 0x1818, 0x1818, 0x1818, 0x1818, 0x1818, + 0x1818, 0x1818, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, + /* 0x69: 'i' */ + 0x0000, 0x00C0, 0x00C0, 0x0000, 0x0000, 0x0000, 0x00C0, 0x00C0, + 0x00C0, 0x00C0, 0x00C0, 0x00C0, 0x00C0, 0x00C0, 0x00C0, 0x00C0, + 0x00C0, 0x00C0, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, + /* 0x6A: 'j' */ + 0x0000, 0x00C0, 0x00C0, 0x0000, 0x0000, 0x0000, 0x00C0, 0x00C0, + 0x00C0, 0x00C0, 0x00C0, 0x00C0, 0x00C0, 0x00C0, 0x00C0, 0x00C0, + 0x00C0, 0x00C0, 0x00C0, 0x00C0, 0x00C0, 0x00F8, 0x0078, 0x0000, + /* 0x6B: 'k' */ + 0x0000, 0x000C, 0x000C, 0x000C, 0x000C, 0x000C, 0x0C0C, 0x060C, + 0x030C, 0x018C, 0x00CC, 0x006C, 0x00FC, 0x019C, 0x038C, 0x030C, + 0x060C, 0x0C0C, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, + /* 0x6C: 'l' */ + 0x0000, 0x00C0, 0x00C0, 0x00C0, 0x00C0, 0x00C0, 0x00C0, 0x00C0, + 0x00C0, 0x00C0, 0x00C0, 0x00C0, 0x00C0, 0x00C0, 0x00C0, 0x00C0, + 0x00C0, 0x00C0, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, + /* 0x6D: 'm' */ + 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x3C7C, 0x7EFF, + 0xE3C7, 0xC183, 0xC183, 0xC183, 0xC183, 0xC183, 0xC183, 0xC183, + 0xC183, 0xC183, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, + /* 0x6E: 'n' */ + 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0798, 0x0FF8, + 0x1C38, 0x1818, 0x1818, 0x1818, 0x1818, 0x1818, 0x1818, 0x1818, + 0x1818, 0x1818, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, + /* 0x6F: 'o' */ + 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x03C0, 0x0FF0, + 0x0C30, 0x1818, 0x1818, 0x1818, 0x1818, 0x1818, 0x1818, 0x0C30, + 0x0FF0, 0x03C0, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, + /* 0x70: 'p' */ + 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x03D8, 0x0FF8, + 0x0C38, 0x1818, 0x1818, 0x1818, 0x1818, 0x1818, 0x1818, 0x0C38, + 0x0FF8, 0x03D8, 0x0018, 0x0018, 0x0018, 0x0018, 0x0018, 0x0000, + /* 0x71: 'q' */ + 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x1BC0, 0x1FF0, + 0x1C30, 0x1818, 0x1818, 0x1818, 0x1818, 0x1818, 0x1818, 0x1C30, + 0x1FF0, 0x1BC0, 0x1800, 0x1800, 0x1800, 0x1800, 0x1800, 0x0000, + /* 0x72: 'r' */ + 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x07B0, 0x03F0, + 0x0070, 0x0030, 0x0030, 0x0030, 0x0030, 0x0030, 0x0030, 0x0030, + 0x0030, 0x0030, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, + /* 0x73: 's' */ + 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x03E0, 0x03F0, + 0x0E38, 0x0C18, 0x0038, 0x03F0, 0x07C0, 0x0C00, 0x0C18, 0x0E38, + 0x07F0, 0x03E0, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, + /* 0x74: 't' */ + 0x0000, 0x0000, 0x0080, 0x00C0, 0x00C0, 0x00C0, 0x07F0, 0x07F0, + 0x00C0, 0x00C0, 0x00C0, 0x00C0, 0x00C0, 0x00C0, 0x00C0, 0x00C0, + 0x07C0, 0x0780, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, + /* 0x75: 'u' */ + 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x1818, 0x1818, + 0x1818, 0x1818, 0x1818, 0x1818, 0x1818, 0x1818, 0x1818, 0x1C38, + 0x1FF0, 0x19E0, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, + /* 0x76: 'v' */ + 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x180C, 0x0C18, + 0x0C18, 0x0C18, 0x0630, 0x0630, 0x0630, 0x0360, 0x0360, 0x0360, + 0x01C0, 0x01C0, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, + /* 0x77: 'w' */ + 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x41C1, 0x41C1, + 0x61C3, 0x6363, 0x6363, 0x6363, 0x3636, 0x3636, 0x3636, 0x1C1C, + 0x1C1C, 0x1C1C, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, + /* 0x78: 'x' */ + 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x381C, 0x1C38, + 0x0C30, 0x0660, 0x03C0, 0x03C0, 0x03C0, 0x03C0, 0x0660, 0x0C30, + 0x1C38, 0x381C, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, + /* 0x79: 'y' */ + 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x3018, 0x1830, + 0x1830, 0x1870, 0x0C60, 0x0C60, 0x0CE0, 0x06C0, 0x06C0, 0x0380, + 0x0380, 0x0380, 0x0180, 0x0180, 0x01C0, 0x00F0, 0x0070, 0x0000, + /* 0x7A: 'z' */ + 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x1FFC, 0x1FFC, + 0x0C00, 0x0600, 0x0300, 0x0180, 0x00C0, 0x0060, 0x0030, 0x0018, + 0x1FFC, 0x1FFC, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, + /* 0x7B: '{' */ + 0x0000, 0x0300, 0x0180, 0x00C0, 0x00C0, 0x00C0, 0x00C0, 0x00C0, + 0x00C0, 0x0060, 0x0060, 0x0030, 0x0060, 0x0040, 0x00C0, 0x00C0, + 0x00C0, 0x00C0, 0x00C0, 0x00C0, 0x0180, 0x0300, 0x0000, 0x0000, + /* 0x7C: '|' */ + 0x0000, 0x0180, 0x0180, 0x0180, 0x0180, 0x0180, 0x0180, 0x0180, + 0x0180, 0x0180, 0x0180, 0x0180, 0x0180, 0x0180, 0x0180, 0x0180, + 0x0180, 0x0180, 0x0180, 0x0180, 0x0180, 0x0180, 0x0180, 0x0000, + /* 0x7D: '}' */ + 0x0000, 0x0060, 0x00C0, 0x01C0, 0x0180, 0x0180, 0x0180, 0x0180, + 0x0180, 0x0300, 0x0300, 0x0600, 0x0300, 0x0100, 0x0180, 0x0180, + 0x0180, 0x0180, 0x0180, 0x0180, 0x00C0, 0x0060, 0x0000, 0x0000, + /* 0x7E: '~' */ + 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, + 0x10F0, 0x1FF8, 0x0F08, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, + 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, + /* 0x7F: ' ' */ + 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, + 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, + 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, + + /* Special Symbols starting at character 0x80 */ + /* 0x80: Circle - Empty */ + 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x03C0, 0x0C30, 0x1008, + 0x2004, 0x2004, 0x4002, 0x4002, 0x4002, 0x4002, 0x4002, 0x2004, + 0x2004, 0x1008, 0x0C30, 0x03C0, 0x0000, 0x0000, 0x0000, 0x0000, + /* 0x81: Circle - Full */ + 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x03C0, 0x0FF0, 0x1FF8, + 0x3FFC, 0x3FFC, 0x7FFE, 0x7FFE, 0x7FFE, 0x7FFE, 0x7FFE, 0x3FFC, + 0x3FFC, 0x1FF8, 0x0FF0, 0x03C0, 0x0000, 0x0000, 0x0000, 0x0000, + /* 0x82: Square - Empty */ + 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x07E0, + 0x0FF0, 0x1818, 0x1818, 0x1818, 0x1818, 0x1818, 0x1818, 0x0FF0, + 0x07E0, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, + /* 0x83: Square - Full */ + 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x07E0, + 0x0FF0, 0x1FF8, 0x1FF8, 0x1FF8, 0x1FF8, 0x1FF8, 0x1FF8, 0x0FF0, + 0x07E0, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, + /* 0x84: Up - Empty */ + 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, + 0x0000, 0x0000, 0x0000, 0x0000, 0x0180, 0x03C0, 0x0660, 0x0C30, + 0x1818, 0x1818, 0x1FF8, 0x1FF8, 0x0000, 0x0000, 0x0000, 0x0000, + /* 0x85: Up - Full */ + 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, + 0x0000, 0x0000, 0x0000, 0x0000, 0x0180, 0x03C0, 0x07E0, 0x0FF0, + 0x1FF8, 0x1FF8, 0x1FF8, 0x1FF8, 0x0000, 0x0000, 0x0000, 0x0000, + /* 0x86: Down - Empty */ + 0x0000, 0x0000, 0x0000, 0x0000, 0x1FF8, 0x1FF8, 0x1818, 0x1818, + 0x0C30, 0x0660, 0x03C0, 0x0180, 0x0000, 0x0000, 0x0000, 0x0000, + 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, + /* 0x87: Down - Full */ + 0x0000, 0x0000, 0x0000, 0x0000, 0x1FF8, 0x1FF8, 0x1FF8, 0x1FF8, + 0x0FF0, 0x07E0, 0x03C0, 0x0180, 0x0000, 0x0000, 0x0000, 0x0000, + 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, + /* 0x88: Left - Empty */ + 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x01E0, + 0x01F0, 0x0198, 0x018C, 0x0186, 0x0186, 0x018C, 0x0198, 0x01F0, + 0x01E0, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, + /* 0x89: Left - Full */ + 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x01E0, + 0x01F0, 0x01F8, 0x01FC, 0x01FE, 0x01FE, 0x01FC, 0x01F8, 0x01F0, + 0x01E0, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, + /* 0x8A: Right - Empty */ + 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0780, + 0x0F80, 0x1980, 0x3180, 0x6180, 0x6180, 0x3180, 0x1980, 0x0F80, + 0x0780, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, + /* 0x8B: Right - Full */ + 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0780, + 0x0F80, 0x1F80, 0x3F80, 0x7F80, 0x7F80, 0x3F80, 0x1F80, 0x0F80, + 0x0780, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, + /* 0x8C: Wait - Empty */ + 0x0000, 0x01C0, 0x0220, 0x0220, 0x0140, 0x0630, 0x0808, 0x0808, + 0x0808, 0x0808, 0x0808, 0x0808, 0x0808, 0x0220, 0x0220, 0x0220, + 0x0220, 0x0220, 0x0220, 0x0220, 0x0220, 0x0220, 0x0220, 0x0000, + /* 0x8D: Wait - Full */ + 0x0000, 0x01C0, 0x03E0, 0x03E0, 0x01C0, 0x07F0, 0x0DD8, 0x0DD8, + 0x0DD8, 0x0DD8, 0x0DD8, 0x0DD8, 0x0DD8, 0x0360, 0x0360, 0x0360, + 0x0360, 0x0360, 0x0360, 0x0360, 0x0360, 0x0360, 0x0360, 0x0000, + /* 0x8E: Walk - Empty */ + 0x0000, 0x01C0, 0x0220, 0x0220, 0x0140, 0x0630, 0x0808, 0x0808, + 0x0808, 0x1004, 0x2002, 0x2002, 0x0140, 0x0220, 0x0220, 0x0410, + 0x0808, 0x0808, 0x1004, 0x1004, 0x2004, 0x4004, 0x0000, 0x0000, + /* 0x8F: Walk - Full */ + 0x0000, 0x01C0, 0x03E0, 0x03E0, 0x01C0, 0x07F0, 0x0DD8, 0x0DD8, + 0x0DD8, 0x19CC, 0x31C6, 0x61C2, 0x01C0, 0x0360, 0x0360, 0x0670, + 0x0C38, 0x0C18, 0x180C, 0x180C, 0x300C, 0x600C, 0x0000, 0x0000, +}; + +#endif /* __FONT_16x24_H_H */ diff --git a/F2024/coe718/labs/lab2/bitbanding/Font_6x8_h.h b/F2024/coe718/labs/lab2/bitbanding/Font_6x8_h.h new file mode 100755 index 0000000..75bce6d --- /dev/null +++ b/F2024/coe718/labs/lab2/bitbanding/Font_6x8_h.h @@ -0,0 +1,248 @@ +/*---------------------------------------------------------------------------- + * Name: Font_6x8_h.h + * Purpose: ASCII font characters (width 6 pixels, height 8 pixels, + * horizontal pixel packing) + *---------------------------------------------------------------------------- + * This file is part of the uVision/ARM development tools. + * This software may only be used under the terms of a valid, current, + * end user licence from KEIL for a compatible version of KEIL software + * development tools. Nothing else gives you the right to use this software. + * + * This software is supplied "AS IS" without warranties of any kind. + * + * Copyright (c) 2010 Keil - An ARM Company. All rights reserved. + *----------------------------------------------------------------------------*/ + +#ifndef __FONT_6x8_H_H +#define __FONT_6x8_H_H + +const unsigned char Font_6x8_h[] = { + /* 0x20: Space ' ' */ + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 0x21: '!' */ + 0x04, 0x04, 0x04, 0x04, 0x04, 0x00, 0x04, 0x00, + /* 0x22: '"' */ + 0x0A, 0x0A, 0x0A, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 0x23: '#' */ + 0x0A, 0x0A, 0x1F, 0x0A, 0x1F, 0x0A, 0x0A, 0x00, + /* 0x24: '$' */ + 0x04, 0x1E, 0x05, 0x0E, 0x14, 0x0F, 0x04, 0x00, + /* 0x25: '%' */ + 0x03, 0x13, 0x08, 0x04, 0x02, 0x19, 0x18, 0x00, + /* 0x26: '&' */ + 0x02, 0x05, 0x05, 0x02, 0x15, 0x09, 0x16, 0x00, + /* 0x27: ''' */ + 0x0C, 0x0C, 0x04, 0x02, 0x00, 0x00, 0x00, 0x00, + /* 0x28: '(' */ + 0x08, 0x04, 0x02, 0x02, 0x02, 0x04, 0x08, 0x00, + /* 0x29: ')' */ + 0x02, 0x04, 0x08, 0x08, 0x08, 0x04, 0x02, 0x00, + /* 0x2A: '*' */ + 0x00, 0x04, 0x15, 0x0E, 0x0E, 0x15, 0x04, 0x00, + /* 0x2B: '+' */ + 0x00, 0x04, 0x04, 0x1F, 0x04, 0x04, 0x00, 0x00, + /* 0x2C: ',' */ + 0x00, 0x00, 0x00, 0x00, 0x0C, 0x0C, 0x04, 0x02, + /* 0x2D: '-' */ + 0x00, 0x00, 0x00, 0x1F, 0x00, 0x00, 0x00, 0x00, + /* 0x2E: '.' */ + 0x00, 0x00, 0x00, 0x00, 0x00, 0x0C, 0x0C, 0x00, + /* 0x2F: '/' */ + 0x00, 0x10, 0x08, 0x04, 0x02, 0x01, 0x00, 0x00, + /* 0x30: '0' */ + 0x0E, 0x11, 0x13, 0x15, 0x19, 0x11, 0x0E, 0x00, + /* 0x31: '1' */ + 0x04, 0x06, 0x04, 0x04, 0x04, 0x04, 0x0E, 0x00, + /* 0x32: '2' */ + 0x0E, 0x11, 0x10, 0x0E, 0x01, 0x01, 0x1F, 0x00, + /* 0x33: '3' */ + 0x1F, 0x10, 0x08, 0x0C, 0x10, 0x11, 0x0E, 0x00, + /* 0x34: '4' */ + 0x08, 0x0C, 0x0A, 0x09, 0x1F, 0x08, 0x08, 0x00, + /* 0x35: '5' */ + 0x1F, 0x01, 0x0F, 0x10, 0x10, 0x11, 0x0E, 0x00, + /* 0x36: '6' */ + 0x1C, 0x02, 0x01, 0x0F, 0x11, 0x11, 0x0E, 0x00, + /* 0x37: '7' */ + 0x1F, 0x10, 0x10, 0x08, 0x04, 0x02, 0x01, 0x00, + /* 0x38: '8' */ + 0x0E, 0x11, 0x11, 0x0E, 0x11, 0x11, 0x0E, 0x00, + /* 0x39: '9' */ + 0x0E, 0x11, 0x11, 0x1E, 0x10, 0x08, 0x07, 0x00, + /* 0x3A: ':' */ + 0x00, 0x00, 0x04, 0x00, 0x04, 0x00, 0x00, 0x00, + /* 0x3B: ';' */ + 0x00, 0x00, 0x04, 0x00, 0x04, 0x04, 0x02, 0x00, + /* 0x3C: '<' */ + 0x10, 0x08, 0x04, 0x02, 0x04, 0x08, 0x10, 0x00, + /* 0x3D: '=' */ + 0x00, 0x00, 0x1F, 0x00, 0x1F, 0x00, 0x00, 0x00, + /* 0x3E: '>' */ + 0x02, 0x04, 0x08, 0x10, 0x08, 0x04, 0x02, 0x00, + /* 0x3F: '?' */ + 0x0E, 0x11, 0x10, 0x0C, 0x04, 0x00, 0x04, 0x00, + /* 0x40: '@' */ + 0x0E, 0x11, 0x15, 0x1D, 0x0D, 0x01, 0x1E, 0x00, + /* 0x41: 'A' */ + 0x04, 0x0A, 0x11, 0x11, 0x1F, 0x11, 0x11, 0x00, + /* 0x42: 'B' */ + 0x0F, 0x11, 0x11, 0x0F, 0x11, 0x11, 0x0F, 0x00, + /* 0x43: 'C' */ + 0x0E, 0x11, 0x01, 0x01, 0x01, 0x11, 0x0E, 0x00, + /* 0x44: 'D' */ + 0x0F, 0x11, 0x11, 0x11, 0x11, 0x11, 0x0F, 0x00, + /* 0x45: 'E' */ + 0x1F, 0x01, 0x01, 0x0F, 0x01, 0x01, 0x1F, 0x00, + /* 0x46: 'F' */ + 0x1F, 0x01, 0x01, 0x0F, 0x01, 0x01, 0x01, 0x00, + /* 0x47: 'G' */ + 0x1E, 0x11, 0x01, 0x01, 0x19, 0x11, 0x1E, 0x00, + /* 0x48: 'H' */ + 0x11, 0x11, 0x11, 0x1F, 0x11, 0x11, 0x11, 0x00, + /* 0x49: 'I' */ + 0x0E, 0x04, 0x04, 0x04, 0x04, 0x04, 0x0E, 0x00, + /* 0x4A: 'J' */ + 0x1C, 0x08, 0x08, 0x08, 0x08, 0x09, 0x06, 0x00, + /* 0x4B: 'K' */ + 0x11, 0x09, 0x05, 0x03, 0x05, 0x09, 0x11, 0x00, + /* 0x4C: 'L' */ + 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x1F, 0x00, + /* 0x4D: 'M' */ + 0x11, 0x1B, 0x15, 0x15, 0x15, 0x11, 0x11, 0x00, + /* 0x4E: 'N' */ + 0x11, 0x11, 0x13, 0x15, 0x19, 0x11, 0x11, 0x00, + /* 0x4F: 'O' */ + 0x0E, 0x11, 0x11, 0x11, 0x11, 0x11, 0x0E, 0x00, + /* 0x50: 'P' */ + 0x0F, 0x11, 0x11, 0x0F, 0x01, 0x01, 0x01, 0x00, + /* 0x51: 'Q' */ + 0x0E, 0x11, 0x11, 0x11, 0x15, 0x09, 0x16, 0x00, + /* 0x52: 'R' */ + 0x0F, 0x11, 0x11, 0x0F, 0x05, 0x09, 0x11, 0x00, + /* 0x53: 'S' */ + 0x0E, 0x11, 0x01, 0x0E, 0x10, 0x11, 0x0E, 0x00, + /* 0x54: 'T' */ + 0x1F, 0x15, 0x04, 0x04, 0x04, 0x04, 0x04, 0x00, + /* 0x55: 'U' */ + 0x11, 0x11, 0x11, 0x11, 0x11, 0x11, 0x0E, 0x00, + /* 0x56: 'V' */ + 0x11, 0x11, 0x11, 0x11, 0x11, 0x0A, 0x04, 0x00, + /* 0x57: 'W' */ + 0x11, 0x11, 0x11, 0x15, 0x15, 0x15, 0x0A, 0x00, + /* 0x58: 'X' */ + 0x11, 0x11, 0x0A, 0x04, 0x0A, 0x11, 0x11, 0x00, + /* 0x59: 'Y' */ + 0x11, 0x11, 0x0A, 0x04, 0x04, 0x04, 0x04, 0x00, + /* 0x5A: 'Z' */ + 0x1F, 0x10, 0x08, 0x0E, 0x02, 0x01, 0x1F, 0x00, + /* 0x5B: '[' */ + 0x1E, 0x02, 0x02, 0x02, 0x02, 0x02, 0x1E, 0x00, + /* 0x5C: '\' */ + 0x00, 0x01, 0x02, 0x04, 0x08, 0x10, 0x00, 0x00, + /* 0x5D: ']' */ + 0x1E, 0x10, 0x10, 0x10, 0x10, 0x10, 0x1E, 0x00, + /* 0x5E: '^' */ + 0x04, 0x0A, 0x11, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 0x5F: '_' */ + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x1F, 0x00, + /* 0x60: ''' */ + 0x06, 0x06, 0x04, 0x08, 0x00, 0x00, 0x00, 0x00, + /* 0x61: 'a' */ + 0x00, 0x00, 0x06, 0x08, 0x0E, 0x09, 0x1E, 0x00, + /* 0x62: 'b' */ + 0x01, 0x01, 0x0D, 0x13, 0x11, 0x13, 0x0D, 0x00, + /* 0x63: 'c' */ + 0x00, 0x00, 0x0E, 0x11, 0x01, 0x11, 0x0E, 0x00, + /* 0x64: 'd' */ + 0x10, 0x10, 0x16, 0x19, 0x11, 0x19, 0x16, 0x00, + /* 0x65: 'e' */ + 0x00, 0x00, 0x0E, 0x11, 0x1F, 0x01, 0x0E, 0x00, + /* 0x66: 'f' */ + 0x08, 0x14, 0x04, 0x0E, 0x04, 0x04, 0x04, 0x00, + /* 0x67: 'g' */ + 0x00, 0x00, 0x0E, 0x19, 0x19, 0x16, 0x10, 0x0E, + /* 0x68: 'h' */ + 0x01, 0x01, 0x0D, 0x13, 0x11, 0x11, 0x11, 0x00, + /* 0x69: 'i' */ + 0x04, 0x00, 0x06, 0x04, 0x04, 0x04, 0x0E, 0x00, + /* 0x6A: 'j' */ + 0x08, 0x00, 0x08, 0x08, 0x08, 0x09, 0x06, 0x00, + /* 0x6B: 'k' */ + 0x01, 0x01, 0x09, 0x05, 0x03, 0x05, 0x09, 0x00, + /* 0x6C: 'l' */ + 0x06, 0x04, 0x04, 0x04, 0x04, 0x04, 0x0E, 0x00, + /* 0x6D: 'm' */ + 0x00, 0x00, 0x0B, 0x15, 0x15, 0x15, 0x15, 0x00, + /* 0x6E: 'n' */ + 0x00, 0x00, 0x0D, 0x13, 0x11, 0x11, 0x11, 0x00, + /* 0x6F: 'o' */ + 0x00, 0x00, 0x0E, 0x11, 0x11, 0x11, 0x0E, 0x00, + /* 0x70: 'p' */ + 0x00, 0x00, 0x0D, 0x13, 0x13, 0x0D, 0x01, 0x01, + /* 0x71: 'q' */ + 0x00, 0x00, 0x16, 0x19, 0x19, 0x16, 0x10, 0x10, + /* 0x72: 'r' */ + 0x00, 0x00, 0x0D, 0x13, 0x01, 0x01, 0x01, 0x00, + /* 0x73: 's' */ + 0x00, 0x00, 0x1E, 0x01, 0x0E, 0x10, 0x0F, 0x00, + /* 0x74: 't' */ + 0x04, 0x04, 0x1F, 0x04, 0x04, 0x14, 0x08, 0x00, + /* 0x75: 'u' */ + 0x00, 0x00, 0x11, 0x11, 0x11, 0x19, 0x16, 0x00, + /* 0x76: 'v' */ + 0x00, 0x00, 0x11, 0x11, 0x11, 0x0A, 0x04, 0x00, + /* 0x77: 'w' */ + 0x00, 0x00, 0x11, 0x11, 0x15, 0x15, 0x0A, 0x00, + /* 0x78: 'x' */ + 0x00, 0x00, 0x11, 0x0A, 0x04, 0x0A, 0x11, 0x00, + /* 0x79: 'y' */ + 0x00, 0x00, 0x11, 0x11, 0x1E, 0x10, 0x11, 0x0E, + /* 0x7A: 'z' */ + 0x00, 0x00, 0x1F, 0x08, 0x04, 0x02, 0x1F, 0x00, + /* 0x7B: '{' */ + 0x08, 0x04, 0x04, 0x02, 0x04, 0x04, 0x08, 0x00, + /* 0x7C: '|' */ + 0x04, 0x04, 0x04, 0x00, 0x04, 0x04, 0x04, 0x00, + /* 0x7D: '}' */ + 0x02, 0x04, 0x04, 0x08, 0x04, 0x04, 0x02, 0x00, + /* 0x7E: '~' */ + 0x02, 0x15, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 0x7F: ' ' */ + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + + /* Special Symbols starting at character 0x80 */ + /* 0x80: Circle - Empty */ + 0x00, 0x00, 0x0C, 0x12, 0x12, 0x0C, 0x00, 0x00, + /* 0x81: Circle - Full */ + 0x00, 0x00, 0x0C, 0x1E, 0x1E, 0x0C, 0x00, 0x00, + /* 0x82: Square - Empty */ + 0x00, 0x00, 0x1E, 0x12, 0x12, 0x1E, 0x00, 0x00, + /* 0x83: Square - Full */ + 0x00, 0x00, 0x1E, 0x1E, 0x1E, 0x1E, 0x00, 0x00, + /* 0x84: Up - Empty */ + 0x00, 0x00, 0x0C, 0x0C, 0x12, 0x1E, 0x00, 0x00, + /* 0x85: Up - Full */ + 0x00, 0x00, 0x0C, 0x0C, 0x1E, 0x1E, 0x00, 0x00, + /* 0x86: Down - Empty */ + 0x00, 0x00, 0x1E, 0x12, 0x0C, 0x0C, 0x00, 0x00, + /* 0x87: Down - Full */ + 0x00, 0x00, 0x1E, 0x1E, 0x0C, 0x0C, 0x00, 0x00, + /* 0x88: Left - Empty */ + 0x00, 0x00, 0x18, 0x16, 0x16, 0x18, 0x00, 0x00, + /* 0x89: Left - Full */ + 0x00, 0x00, 0x18, 0x1E, 0x1E, 0x18, 0x00, 0x00, + /* 0x8A: Right - Empty */ + 0x00, 0x00, 0x06, 0x1A, 0x1A, 0x06, 0x00, 0x00, + /* 0x8B: Right - Full */ + 0x00, 0x00, 0x06, 0x1E, 0x1E, 0x06, 0x00, 0x00, + /* 0x8C: Wait - Empty */ + 0x00, 0x00, 0x0C, 0x12, 0x12, 0x0C, 0x00, 0x00, + /* 0x8D: Wait - Full */ + 0x00, 0x00, 0x0C, 0x1E, 0x1E, 0x0C, 0x00, 0x00, + /* 0x8E: Walk - Empty */ + 0x00, 0x00, 0x1E, 0x12, 0x12, 0x1E, 0x00, 0x00, + /* 0x8F: Walk - Full */ + 0x00, 0x00, 0x1E, 0x1E, 0x1E, 0x1E, 0x00, 0x00, +}; + +#endif /* __FONT_6x8_H_H */ diff --git a/F2024/coe718/labs/lab2/bitbanding/GLCD.h b/F2024/coe718/labs/lab2/bitbanding/GLCD.h new file mode 100755 index 0000000..f48ff4b --- /dev/null +++ b/F2024/coe718/labs/lab2/bitbanding/GLCD.h @@ -0,0 +1,59 @@ +/******************************************************************************/ +/* GLCD.h: Graphic LCD function prototypes and defines */ +/******************************************************************************/ +/* This file is part of the uVision/ARM development tools. */ +/* Copyright (c) 2005-2011 Keil - An ARM Company. All rights reserved. */ +/* This software may only be used under the terms of a valid, current, */ +/* end user licence from KEIL for a compatible version of KEIL software */ +/* development tools. Nothing else gives you the right to use this software. */ +/******************************************************************************/ + +#ifndef _GLCD_H +#define _GLCD_H + +/*------------------------------------------------------------------------------ + Color coding + GLCD is coded: 15..11 red, 10..5 green, 4..0 blue (unsigned short) GLCD_R5, GLCD_G6, GLCD_B5 + original coding: 17..12 red, 11..6 green, 5..0 blue ORG_R6, ORG_G6, ORG_B6 + + ORG_R1..5 = GLCD_R0..4, ORG_R0 = GLCD_R4 + ORG_G0..5 = GLCD_G0..5, + ORG_B1..5 = GLCD_B0..4, ORG_B0 = GLCD_B4 + *----------------------------------------------------------------------------*/ + +/* GLCD RGB color definitions */ +#define Black 0x0000 /* 0, 0, 0 */ +#define Navy 0x000F /* 0, 0, 128 */ +#define DarkGreen 0x03E0 /* 0, 128, 0 */ +#define DarkCyan 0x03EF /* 0, 128, 128 */ +#define Maroon 0x7800 /* 128, 0, 0 */ +#define Purple 0x780F /* 128, 0, 128 */ +#define Olive 0x7BE0 /* 128, 128, 0 */ +#define LightGrey 0xC618 /* 192, 192, 192 */ +#define DarkGrey 0x7BEF /* 128, 128, 128 */ +#define Blue 0x001F /* 0, 0, 255 */ +#define Green 0x07E0 /* 0, 255, 0 */ +#define Cyan 0x07FF /* 0, 255, 255 */ +#define Red 0xF800 /* 255, 0, 0 */ +#define Magenta 0xF81F /* 255, 0, 255 */ +#define Yellow 0xFFE0 /* 255, 255, 0 */ +#define White 0xFFFF /* 255, 255, 255 */ + +extern void GLCD_Init (void); +extern void GLCD_WindowMax (void); +extern void GLCD_PutPixel (unsigned int x, unsigned int y); +extern void GLCD_SetTextColor (unsigned short color); +extern void GLCD_SetBackColor (unsigned short color); +extern void GLCD_Clear (unsigned short color); +extern void GLCD_DrawChar (unsigned int x, unsigned int y, unsigned int cw, unsigned int ch, unsigned char *c); +extern void GLCD_DisplayChar (unsigned int ln, unsigned int col, unsigned char fi, unsigned char c); +extern void GLCD_DisplayString (unsigned int ln, unsigned int col, unsigned char fi, unsigned char *s); +extern void GLCD_ClearLn (unsigned int ln, unsigned char fi); +extern void GLCD_Bargraph (unsigned int x, unsigned int y, unsigned int w, unsigned int h, unsigned int val); +extern void GLCD_Bitmap (unsigned int x, unsigned int y, unsigned int w, unsigned int h, unsigned char *bitmap); +extern void GLCD_ScrollVertical (unsigned int dy); + +extern void GLCD_WrCmd (unsigned char cmd); +extern void GLCD_WrReg (unsigned char reg, unsigned short val); + +#endif /* _GLCD_H */ diff --git a/F2024/coe718/labs/lab2/bitbanding/GLCD_SPI_LPC1700.c b/F2024/coe718/labs/lab2/bitbanding/GLCD_SPI_LPC1700.c new file mode 100755 index 0000000..5037c8e --- /dev/null +++ b/F2024/coe718/labs/lab2/bitbanding/GLCD_SPI_LPC1700.c @@ -0,0 +1,928 @@ +/******************************************************************************/ +/* GLCD_SPI_LPC1700.c: LPC1700 low level Graphic LCD (240x320 pixels) driven */ +/* with SPI functions */ +/******************************************************************************/ +/* This file is part of the uVision/ARM development tools. */ +/* Copyright (c) 2005-2011 Keil - An ARM Company. All rights reserved. */ +/* This software may only be used under the terms of a valid, current, */ +/* end user licence from KEIL for a compatible version of KEIL software */ +/* development tools. Nothing else gives you the right to use this software. */ +/******************************************************************************/ + + +#include +#include "GLCD.h" +#include "Font_6x8_h.h" +#include "Font_16x24_h.h" + +/************************** Orientation configuration ************************/ + +#define LANDSCAPE 1 /* 1 for landscape, 0 for portrait */ +#define ROTATE180 0 /* 1 to rotate the screen for 180 deg */ + +/*********************** Hardware specific configuration **********************/ + +/* SPI Interface: SPI3 + + PINS: + - CS = P0.6 (GPIO pin) + - RS = GND + - WR/SCK = P0.7 (SCK1) + - RD = GND + - SDO = P0.8 (MISO1) + - SDI = P0.9 (MOSI1) */ + +#define PIN_CS (1 << 6) +#define PIN_CLK (1 << 7) +#define PIN_DAT (1 << 9) + +#define IN 0x00 +#define OUT 0x01 + +/* SPI_SR - bit definitions */ +#define TFE 0x01 +#define RNE 0x04 +#define BSY 0x10 + +/*------------------------- Speed dependant settings -------------------------*/ + +/* If processor works on high frequency delay has to be increased, it can be + increased by factor 2^N by this constant */ +#define DELAY_2N 18 + +/*---------------------- Graphic LCD size definitions ------------------------*/ + +#if (LANDSCAPE == 1) +#define WIDTH 320 /* Screen Width (in pixels) */ +#define HEIGHT 240 /* Screen Hight (in pixels) */ +#else +#define WIDTH 240 /* Screen Width (in pixels) */ +#define HEIGHT 320 /* Screen Hight (in pixels) */ +#endif +#define BPP 16 /* Bits per pixel */ +#define BYPP ((BPP+7)/8) /* Bytes per pixel */ + +/*--------------- Graphic LCD interface hardware definitions -----------------*/ + +/* Pin CS setting to 0 or 1 */ +#define LCD_CS(x) ((x) ? (LPC_GPIO0->FIOSET = PIN_CS) : (LPC_GPIO0->FIOCLR = PIN_CS)) +#define LCD_CLK(x) ((x) ? (LPC_GPIO0->FIOSET = PIN_CLK) : (LPC_GPIO0->FIOCLR = PIN_CLK)) +#define LCD_DAT(x) ((x) ? (LPC_GPIO0->FIOSET = PIN_DAT) : (LPC_GPIO0->FIOCLR = PIN_DAT)) + +#define DAT_MODE(x) ((x == OUT) ? (LPC_GPIO0->FIODIR |= PIN_DAT) : (LPC_GPIO0->FIODIR &= ~PIN_DAT)) +#define BUS_VAL() ((LPC_GPIO0->FIOPIN & PIN_DAT) != 0) + + +#define SPI_START (0x70) /* Start byte for SPI transfer */ +#define SPI_RD (0x01) /* WR bit 1 within start */ +#define SPI_WR (0x00) /* WR bit 0 within start */ +#define SPI_DATA (0x02) /* RS bit 1 within start byte */ +#define SPI_INDEX (0x00) /* RS bit 0 within start byte */ + +#define BG_COLOR 0 /* Background color */ +#define TXT_COLOR 1 /* Text color */ + + +/*---------------------------- Global variables ------------------------------*/ + +/******************************************************************************/ +static volatile unsigned short Color[2] = {White, Black}; +static unsigned char Himax; + +/************************ Local auxiliary functions ***************************/ + +/******************************************************************************* +* Delay in while loop cycles * +* Parameter: cnt: number of while cycles to delay * +* Return: * +*******************************************************************************/ + +static void delay (int cnt) { + cnt <<= DELAY_2N; + while (cnt--); +} + + +/******************************************************************************* +* Transfer 1 byte over the serial communication * +* Parameter: byte: byte to be sent * +* mode: OUT = transmit byte, IN = receive byte * +* Return: byte read while sending * +*******************************************************************************/ +static unsigned char spi_tran_man (unsigned char byte, unsigned int mode) { + unsigned char val = 0; + int i; + + if (mode == OUT) { DAT_MODE (OUT); } + else { DAT_MODE (IN); } + + for (i = 7; i >= 0; i--) { + LCD_CLK(0); + delay(1); + if (mode == OUT) { + LCD_DAT((byte & (1 << i)) != 0); + } + else { + val |= (BUS_VAL() << i); + } + LCD_CLK(1); + delay(1); + } + return (val); +} + + +/******************************************************************************* +* Transfer 1 byte over the serial communication * +* Parameter: byte: byte to be sent * +* Return: byte read while sending * +*******************************************************************************/ + +static __inline unsigned char spi_tran (unsigned char byte) { + + LPC_SSP1->DR = byte; + while (!(LPC_SSP1->SR & RNE)); /* Wait for send to finish */ + return (LPC_SSP1->DR); +} + + +/******************************************************************************* +* Write a command the LCD controller * +* Parameter: cmd: command to be written * +* Return: * +*******************************************************************************/ + +static __inline void wr_cmd (unsigned char cmd) { + LCD_CS(0); + spi_tran(SPI_START | SPI_WR | SPI_INDEX); /* Write : RS = 0, RW = 0 */ + spi_tran(0); + spi_tran(cmd); + LCD_CS(1); +} + + +/******************************************************************************* +* Write data to the LCD controller * +* Parameter: dat: data to be written * +* Return: * +*******************************************************************************/ + +static __inline void wr_dat (unsigned short dat) { + LCD_CS(0); + spi_tran(SPI_START | SPI_WR | SPI_DATA); /* Write : RS = 1, RW = 0 */ + spi_tran((dat >> 8)); /* Write D8..D15 */ + spi_tran((dat & 0xFF)); /* Write D0..D7 */ + LCD_CS(1); +} + + +/******************************************************************************* +* Start of data writing to the LCD controller * +* Parameter: * +* Return: * +*******************************************************************************/ + +static __inline void wr_dat_start (void) { + LCD_CS(0); + spi_tran(SPI_START | SPI_WR | SPI_DATA); /* Write : RS = 1, RW = 0 */ +} + + +/******************************************************************************* +* Stop of data writing to the LCD controller * +* Parameter: * +* Return: * +*******************************************************************************/ + +static __inline void wr_dat_stop (void) { + + LCD_CS(1); +} + + +/******************************************************************************* +* Data writing to the LCD controller * +* Parameter: dat: data to be written * +* Return: * +*******************************************************************************/ + +static __inline void wr_dat_only (unsigned short dat) { + + spi_tran((dat >> 8)); /* Write D8..D15 */ + spi_tran((dat & 0xFF)); /* Write D0..D7 */ +} + + +/******************************************************************************* +* Read data from the LCD controller * +* Parameter: * +* Return: read data * +*******************************************************************************/ + +static __inline unsigned short rd_dat (void) { + unsigned short val = 0; + + LCD_CS(0); + spi_tran(SPI_START | SPI_RD | SPI_DATA); /* Read: RS = 1, RW = 1 */ + spi_tran(0); /* Dummy read 1 */ + val = spi_tran(0); /* Read D8..D15 */ + val <<= 8; + val |= spi_tran(0); /* Read D0..D7 */ + LCD_CS(1); + return (val); +} + + +/******************************************************************************* +* Write a value to the to LCD register * +* Parameter: reg: register to be written * +* val: value to write to the register * +*******************************************************************************/ + +static __inline void wr_reg (unsigned char reg, unsigned short val) { + + wr_cmd(reg); + wr_dat(val); +} + + +/******************************************************************************* +* Read from the LCD register * +* Parameter: reg: register to be read * +* Return: value read from the register * +*******************************************************************************/ + +static unsigned short rd_reg (unsigned char reg) { + + wr_cmd(reg); + return(rd_dat()); +} + + +/******************************************************************************* +* Read LCD controller ID (Himax GLCD) * +* Parameter: (none) * +* Return: controller ID * +*******************************************************************************/ + +static unsigned short rd_id_man (void) { + unsigned short val; + + /* Set MOSI, MISO and SCK as GPIO pins, with pull-down/pull-up disabled */ + LPC_PINCON->PINSEL0 &= ~((3 << 18) | (3 << 16) | (3 << 14)); + LPC_PINCON->PINMODE0 |= 0x000AA000; + LPC_GPIO0->FIODIR |= PIN_CLK; /* SCK pin is GPIO output */ + LCD_CS (1); /* Set chip select high */ + LCD_CLK(1); /* Set clock high */ + + LCD_CS(0); + spi_tran_man (SPI_START | SPI_WR | SPI_INDEX, OUT); + spi_tran_man (0x00, OUT); + LCD_CS(1); + + LCD_CS(0); + spi_tran_man (SPI_START | SPI_RD | SPI_DATA, OUT); + val = spi_tran_man(0, IN); + LCD_CS(1); + + /* Connect MOSI, MISO, and SCK to SSP peripheral */ + LPC_GPIO0->FIODIR &= ~PIN_CLK; + LPC_PINCON->PINSEL0 |= (2 << 18) | (2 << 16) | (2 << 14); + LPC_PINCON->PINMODE0 &= ~0x000FF000; + + return (val); +} + + +/************************ Exported functions **********************************/ + +/******************************************************************************* +* Initialize the Graphic LCD controller * +* Parameter: * +* Return: * +*******************************************************************************/ + +void GLCD_Init (void) { + unsigned short driverCode; + + /* Enable clock for SSP1, clock = CCLK / 2 */ + LPC_SC->PCONP |= 0x00000400; + LPC_SC->PCLKSEL0 |= 0x00200000; + + /* Configure the LCD Control pins */ + LPC_PINCON->PINSEL9 &= 0xF0FFFFFF; + LPC_GPIO4->FIODIR |= 0x30000000; + LPC_GPIO4->FIOSET = 0x20000000; + + /* SSEL1 is GPIO output set to high */ + LPC_GPIO0->FIODIR |= 0x00000040; + LPC_GPIO0->FIOSET = 0x00000040; + LPC_PINCON->PINSEL0 &= 0xFFF03FFF; + LPC_PINCON->PINSEL0 |= 0x000A8000; + + /* Enable SPI in Master Mode, CPOL=1, CPHA=1 */ + /* Max. 12.5 MBit used for Data Transfer @ 100MHz */ + LPC_SSP1->CR0 = 0x01C7; + LPC_SSP1->CPSR = 0x02; + LPC_SSP1->CR1 = 0x02; + + driverCode = rd_id_man (); + if (driverCode == 0) { + driverCode = rd_reg(0x00); + } + + if (driverCode == 0x47) { /* LCD with HX8347-D LCD Controller */ + Himax = 1; /* Set Himax LCD controller flag */ + /* Driving ability settings ----------------------------------------------*/ + wr_reg(0xEA, 0x00); /* Power control internal used (1) */ + wr_reg(0xEB, 0x20); /* Power control internal used (2) */ + wr_reg(0xEC, 0x0C); /* Source control internal used (1) */ + wr_reg(0xED, 0xC7); /* Source control internal used (2) */ + wr_reg(0xE8, 0x38); /* Source output period Normal mode */ + wr_reg(0xE9, 0x10); /* Source output period Idle mode */ + wr_reg(0xF1, 0x01); /* RGB 18-bit interface ;0x0110 */ + wr_reg(0xF2, 0x10); + + /* Adjust the Gamma Curve ------------------------------------------------*/ + wr_reg(0x40, 0x01); + wr_reg(0x41, 0x00); + wr_reg(0x42, 0x00); + wr_reg(0x43, 0x10); + wr_reg(0x44, 0x0E); + wr_reg(0x45, 0x24); + wr_reg(0x46, 0x04); + wr_reg(0x47, 0x50); + wr_reg(0x48, 0x02); + wr_reg(0x49, 0x13); + wr_reg(0x4A, 0x19); + wr_reg(0x4B, 0x19); + wr_reg(0x4C, 0x16); + + wr_reg(0x50, 0x1B); + wr_reg(0x51, 0x31); + wr_reg(0x52, 0x2F); + wr_reg(0x53, 0x3F); + wr_reg(0x54, 0x3F); + wr_reg(0x55, 0x3E); + wr_reg(0x56, 0x2F); + wr_reg(0x57, 0x7B); + wr_reg(0x58, 0x09); + wr_reg(0x59, 0x06); + wr_reg(0x5A, 0x06); + wr_reg(0x5B, 0x0C); + wr_reg(0x5C, 0x1D); + wr_reg(0x5D, 0xCC); + + /* Power voltage setting -------------------------------------------------*/ + wr_reg(0x1B, 0x1B); + wr_reg(0x1A, 0x01); + wr_reg(0x24, 0x2F); + wr_reg(0x25, 0x57); + wr_reg(0x23, 0x88); + + /* Power on setting ------------------------------------------------------*/ + wr_reg(0x18, 0x36); /* Internal oscillator frequency adj */ + wr_reg(0x19, 0x01); /* Enable internal oscillator */ + wr_reg(0x01, 0x00); /* Normal mode, no scrool */ + wr_reg(0x1F, 0x88); /* Power control 6 - DDVDH Off */ + delay(20); + wr_reg(0x1F, 0x82); /* Power control 6 - Step-up: 3 x VCI */ + delay(5); + wr_reg(0x1F, 0x92); /* Power control 6 - Step-up: On */ + delay(5); + wr_reg(0x1F, 0xD2); /* Power control 6 - VCOML active */ + delay(5); + + /* Color selection -------------------------------------------------------*/ + wr_reg(0x17, 0x55); /* RGB, System interface: 16 Bit/Pixel*/ + wr_reg(0x00, 0x00); /* Scrolling off, no standby */ + + /* Interface config ------------------------------------------------------*/ + wr_reg(0x2F, 0x11); /* LCD Drive: 1-line inversion */ + wr_reg(0x31, 0x00); + wr_reg(0x32, 0x00); /* DPL=0, HSPL=0, VSPL=0, EPL=0 */ + + /* Display on setting ----------------------------------------------------*/ + wr_reg(0x28, 0x38); /* PT(0,0) active, VGL/VGL */ + delay(20); + wr_reg(0x28, 0x3C); /* Display active, VGL/VGL */ + + #if (LANDSCAPE == 1) + #if (ROTATE180 == 0) + wr_reg (0x16, 0xA8); + #else + wr_reg (0x16, 0x68); + #endif + #else + #if (ROTATE180 == 0) + wr_reg (0x16, 0x08); + #else + wr_reg (0x16, 0xC8); + #endif + #endif + + /* Display scrolling settings --------------------------------------------*/ + wr_reg(0x0E, 0x00); /* TFA MSB */ + wr_reg(0x0F, 0x00); /* TFA LSB */ + wr_reg(0x10, 320 >> 8); /* VSA MSB */ + wr_reg(0x11, 320 & 0xFF); /* VSA LSB */ + wr_reg(0x12, 0x00); /* BFA MSB */ + wr_reg(0x13, 0x00); /* BFA LSB */ + } + else { + Himax = 0; /* This is not Himax LCD controller */ + /* Start Initial Sequence ------------------------------------------------*/ + #if (ROTATE180 == 1) + wr_reg(0x01, 0x0000); /* Clear SS bit */ + #else + wr_reg(0x01, 0x0100); /* Set SS bit */ + #endif + wr_reg(0x02, 0x0700); /* Set 1 line inversion */ + wr_reg(0x04, 0x0000); /* Resize register */ + wr_reg(0x08, 0x0207); /* 2 lines front, 7 back porch */ + wr_reg(0x09, 0x0000); /* Set non-disp area refresh cyc ISC */ + wr_reg(0x0A, 0x0000); /* FMARK function */ + wr_reg(0x0C, 0x0000); /* RGB interface setting */ + wr_reg(0x0D, 0x0000); /* Frame marker Position */ + wr_reg(0x0F, 0x0000); /* RGB interface polarity */ + + /* Power On sequence -----------------------------------------------------*/ + wr_reg(0x10, 0x0000); /* Reset Power Control 1 */ + wr_reg(0x11, 0x0000); /* Reset Power Control 2 */ + wr_reg(0x12, 0x0000); /* Reset Power Control 3 */ + wr_reg(0x13, 0x0000); /* Reset Power Control 4 */ + delay(20); /* Discharge cap power voltage (200ms)*/ + wr_reg(0x10, 0x12B0); /* SAP, BT[3:0], AP, DSTB, SLP, STB */ + wr_reg(0x11, 0x0007); /* DC1[2:0], DC0[2:0], VC[2:0] */ + delay(5); /* Delay 50 ms */ + wr_reg(0x12, 0x01BD); /* VREG1OUT voltage */ + delay(5); /* Delay 50 ms */ + wr_reg(0x13, 0x1400); /* VDV[4:0] for VCOM amplitude */ + wr_reg(0x29, 0x000E); /* VCM[4:0] for VCOMH */ + delay(5); /* Delay 50 ms */ + wr_reg(0x20, 0x0000); /* GRAM horizontal Address */ + wr_reg(0x21, 0x0000); /* GRAM Vertical Address */ + + /* Adjust the Gamma Curve ------------------------------------------------*/ + switch (driverCode) { + case 0x5408: /* LCD with SPFD5408 LCD Controller */ + wr_reg(0x30, 0x0B0D); + wr_reg(0x31, 0x1923); + wr_reg(0x32, 0x1C26); + wr_reg(0x33, 0x261C); + wr_reg(0x34, 0x2419); + wr_reg(0x35, 0x0D0B); + wr_reg(0x36, 0x1006); + wr_reg(0x37, 0x0610); + wr_reg(0x38, 0x0706); + wr_reg(0x39, 0x0304); + wr_reg(0x3A, 0x0E05); + wr_reg(0x3B, 0x0E01); + wr_reg(0x3C, 0x010E); + wr_reg(0x3D, 0x050E); + wr_reg(0x3E, 0x0403); + wr_reg(0x3F, 0x0607); + break; + + case 0x9325: /* LCD with RM68050 LCD Controller */ + wr_reg(0x0030,0x0000); + wr_reg(0x0031,0x0607); + wr_reg(0x0032,0x0305); + wr_reg(0x0035,0x0000); + wr_reg(0x0036,0x1604); + wr_reg(0x0037,0x0204); + wr_reg(0x0038,0x0001); + wr_reg(0x0039,0x0707); + wr_reg(0x003C,0x0000); + wr_reg(0x003D,0x000F); + break; + + case 0x9320: /* LCD with ILI9320 LCD Controller */ + default: /* LCD with other LCD Controller */ + wr_reg(0x30, 0x0006); + wr_reg(0x31, 0x0101); + wr_reg(0x32, 0x0003); + wr_reg(0x35, 0x0106); + wr_reg(0x36, 0x0B02); + wr_reg(0x37, 0x0302); + wr_reg(0x38, 0x0707); + wr_reg(0x39, 0x0007); + wr_reg(0x3C, 0x0600); + wr_reg(0x3D, 0x020B); + break; + } + + /* Set GRAM area ---------------------------------------------------------*/ + wr_reg(0x50, 0x0000); /* Horizontal GRAM Start Address */ + wr_reg(0x51, (HEIGHT-1)); /* Horizontal GRAM End Address */ + wr_reg(0x52, 0x0000); /* Vertical GRAM Start Address */ + wr_reg(0x53, (WIDTH-1)); /* Vertical GRAM End Address */ + + /* Set Gate Scan Line ----------------------------------------------------*/ + switch (driverCode) { + case 0x5408: /* LCD with SPFD5408 LCD Controller */ + case 0x9325: /* LCD with RM68050 LCD Controller */ + #if (LANDSCAPE ^ ROTATE180) + wr_reg(0x60, 0x2700); + #else + wr_reg(0x60, 0xA700); + #endif + break; + + case 0x9320: /* LCD with ILI9320 LCD Controller */ + default: /* LCD with other LCD Controller */ + #if (LANDSCAPE ^ ROTATE180) + wr_reg(0x60, 0xA700); + #else + wr_reg(0x60, 0x2700); + #endif + break; + } + wr_reg(0x61, 0x0001); /* NDL,VLE, REV */ + wr_reg(0x6A, 0x0000); /* Set scrolling line */ + + /* Partial Display Control -----------------------------------------------*/ + wr_reg(0x80, 0x0000); + wr_reg(0x81, 0x0000); + wr_reg(0x82, 0x0000); + wr_reg(0x83, 0x0000); + wr_reg(0x84, 0x0000); + wr_reg(0x85, 0x0000); + + /* Panel Control ---------------------------------------------------------*/ + wr_reg(0x90, 0x0010); + wr_reg(0x92, 0x0000); + wr_reg(0x93, 0x0003); + wr_reg(0x95, 0x0110); + wr_reg(0x97, 0x0000); + wr_reg(0x98, 0x0000); + + /* Set GRAM write direction + I/D=11 (Horizontal : increment, Vertical : increment) */ + #if (LANDSCAPE == 1) + /* AM=1 (address is updated in vertical writing direction) */ + wr_reg(0x03, 0x1038); + #else + /* AM=0 (address is updated in horizontal writing direction) */ + wr_reg(0x03, 0x1030); + #endif + + wr_reg(0x07, 0x0137); /* 262K color and display ON */ + } + LPC_GPIO4->FIOSET = 0x10000000; +} + + +/******************************************************************************* +* Set draw window region * +* Parameter: x: horizontal position * +* y: vertical position * +* w: window width in pixel * +* h: window height in pixels * +* Return: * +*******************************************************************************/ + +void GLCD_SetWindow (unsigned int x, unsigned int y, unsigned int w, unsigned int h) { + unsigned int xe, ye; + + if (Himax) { + xe = x+w-1; + ye = y+h-1; + + wr_reg(0x02, x >> 8); /* Column address start MSB */ + wr_reg(0x03, x & 0xFF); /* Column address start LSB */ + wr_reg(0x04, xe >> 8); /* Column address end MSB */ + wr_reg(0x05, xe & 0xFF); /* Column address end LSB */ + + wr_reg(0x06, y >> 8); /* Row address start MSB */ + wr_reg(0x07, y & 0xFF); /* Row address start LSB */ + wr_reg(0x08, ye >> 8); /* Row address end MSB */ + wr_reg(0x09, ye & 0xFF); /* Row address end LSB */ + } + else { + #if (LANDSCAPE == 1) + wr_reg(0x50, y); /* Vertical GRAM Start Address */ + wr_reg(0x51, y+h-1); /* Vertical GRAM End Address (-1) */ + wr_reg(0x52, x); /* Horizontal GRAM Start Address */ + wr_reg(0x53, x+w-1); /* Horizontal GRAM End Address (-1) */ + wr_reg(0x20, y); + wr_reg(0x21, x); + #else + wr_reg(0x50, x); /* Horizontal GRAM Start Address */ + wr_reg(0x51, x+w-1); /* Horizontal GRAM End Address (-1) */ + wr_reg(0x52, y); /* Vertical GRAM Start Address */ + wr_reg(0x53, y+h-1); /* Vertical GRAM End Address (-1) */ + wr_reg(0x20, x); + wr_reg(0x21, y); + #endif + } +} + + +/******************************************************************************* +* Set draw window region to whole screen * +* Parameter: * +* Return: * +*******************************************************************************/ + +void GLCD_WindowMax (void) { + GLCD_SetWindow (0, 0, WIDTH, HEIGHT); +} + + +/******************************************************************************* +* Draw a pixel in foreground color * +* Parameter: x: horizontal position * +* y: vertical position * +* Return: * +*******************************************************************************/ + +void GLCD_PutPixel (unsigned int x, unsigned int y) { + + if (Himax) { + wr_reg(0x02, x >> 8); /* Column address start MSB */ + wr_reg(0x03, x & 0xFF); /* Column address start LSB */ + wr_reg(0x04, x >> 8); /* Column address end MSB */ + wr_reg(0x05, x & 0xFF); /* Column address end LSB */ + + wr_reg(0x06, y >> 8); /* Row address start MSB */ + wr_reg(0x07, y & 0xFF); /* Row address start LSB */ + wr_reg(0x08, y >> 8); /* Row address end MSB */ + wr_reg(0x09, y & 0xFF); /* Row address end LSB */ + } + else { + #if (LANDSCAPE == 1) + wr_reg(0x20, y); + wr_reg(0x21, x); + #else + wr_reg(0x20, x); + wr_reg(0x21, y); + #endif + } + + wr_cmd(0x22); + wr_dat(Color[TXT_COLOR]); +} + + +/******************************************************************************* +* Set foreground color * +* Parameter: color: foreground color * +* Return: * +*******************************************************************************/ + +void GLCD_SetTextColor (unsigned short color) { + + Color[TXT_COLOR] = color; +} + + +/******************************************************************************* +* Set background color * +* Parameter: color: background color * +* Return: * +*******************************************************************************/ + +void GLCD_SetBackColor (unsigned short color) { + + Color[BG_COLOR] = color; +} + + +/******************************************************************************* +* Clear display * +* Parameter: color: display clearing color * +* Return: * +*******************************************************************************/ + +void GLCD_Clear (unsigned short color) { + unsigned int i; + + GLCD_WindowMax(); + wr_cmd(0x22); + wr_dat_start(); + + for(i = 0; i < (WIDTH*HEIGHT); i++) + wr_dat_only(color); + wr_dat_stop(); +} + + +/******************************************************************************* +* Draw character on given position * +* Parameter: x: horizontal position * +* y: vertical position * +* cw: character width in pixel * +* ch: character height in pixels * +* c: pointer to character bitmap * +* Return: * +*******************************************************************************/ + +void GLCD_DrawChar (unsigned int x, unsigned int y, unsigned int cw, unsigned int ch, unsigned char *c) { + unsigned int i, j, k, pixs; + + GLCD_SetWindow(x, y, cw, ch); + + wr_cmd(0x22); + wr_dat_start(); + + k = (cw + 7)/8; + + if (k == 1) { + for (j = 0; j < ch; j++) { + pixs = *(unsigned char *)c; + c += 1; + + for (i = 0; i < cw; i++) { + wr_dat_only (Color[(pixs >> i) & 1]); + } + } + } + else if (k == 2) { + for (j = 0; j < ch; j++) { + pixs = *(unsigned short *)c; + c += 2; + + for (i = 0; i < cw; i++) { + wr_dat_only (Color[(pixs >> i) & 1]); + } + } + } + wr_dat_stop(); +} + + +/******************************************************************************* +* Disply character on given line * +* Parameter: ln: line number * +* col: column number * +* fi: font index (0 = 6x8, 1 = 16x24) * +* c: ascii character * +* Return: * +*******************************************************************************/ + +void GLCD_DisplayChar (unsigned int ln, unsigned int col, unsigned char fi, unsigned char c) { + + c -= 32; + switch (fi) { + case 0: /* Font 6 x 8 */ + GLCD_DrawChar(col * 6, ln * 8, 6, 8, (unsigned char *)&Font_6x8_h [c * 8]); + break; + case 1: /* Font 16 x 24 */ + GLCD_DrawChar(col * 16, ln * 24, 16, 24, (unsigned char *)&Font_16x24_h[c * 24]); + break; + } +} + + +/******************************************************************************* +* Disply string on given line * +* Parameter: ln: line number * +* col: column number * +* fi: font index (0 = 6x8, 1 = 16x24) * +* s: pointer to string * +* Return: * +*******************************************************************************/ + +void GLCD_DisplayString (unsigned int ln, unsigned int col, unsigned char fi, unsigned char *s) { + + while (*s) { + GLCD_DisplayChar(ln, col++, fi, *s++); + } +} + + +/******************************************************************************* +* Clear given line * +* Parameter: ln: line number * +* fi: font index (0 = 6x8, 1 = 16x24) * +* Return: * +*******************************************************************************/ + +void GLCD_ClearLn (unsigned int ln, unsigned char fi) { + unsigned char i; + unsigned char buf[60]; + + GLCD_WindowMax(); + switch (fi) { + case 0: /* Font 6 x 8 */ + for (i = 0; i < (WIDTH+5)/6; i++) + buf[i] = ' '; + buf[i+1] = 0; + break; + case 1: /* Font 16 x 24 */ + for (i = 0; i < (WIDTH+15)/16; i++) + buf[i] = ' '; + buf[i+1] = 0; + break; + } + GLCD_DisplayString (ln, 0, fi, buf); +} + +/******************************************************************************* +* Draw bargraph * +* Parameter: x: horizontal position * +* y: vertical position * +* w: maximum width of bargraph (in pixels) * +* h: bargraph height * +* val: value of active bargraph (in 1/1024) * +* Return: * +*******************************************************************************/ + +void GLCD_Bargraph (unsigned int x, unsigned int y, unsigned int w, unsigned int h, unsigned int val) { + int i,j; + + val = (val * w) >> 10; /* Scale value */ + GLCD_SetWindow(x, y, w, h); + wr_cmd(0x22); + wr_dat_start(); + for (i = 0; i < h; i++) { + for (j = 0; j <= w-1; j++) { + if(j >= val) { + wr_dat_only(Color[BG_COLOR]); + } else { + wr_dat_only(Color[TXT_COLOR]); + } + } + } + wr_dat_stop(); +} + + +/******************************************************************************* +* Display graphical bitmap image at position x horizontally and y vertically * +* (This function is optimized for 16 bits per pixel format, it has to be * +* adapted for any other bits per pixel format) * +* Parameter: x: horizontal position * +* y: vertical position * +* w: width of bitmap * +* h: height of bitmap * +* bitmap: address at which the bitmap data resides * +* Return: * +*******************************************************************************/ + +void GLCD_Bitmap (unsigned int x, unsigned int y, unsigned int w, unsigned int h, unsigned char *bitmap) { + int i, j; + unsigned short *bitmap_ptr = (unsigned short *)bitmap; + + GLCD_SetWindow (x, y, w, h); + + wr_cmd(0x22); + wr_dat_start(); + for (i = (h-1)*w; i > -1; i -= w) { + for (j = 0; j < w; j++) { + wr_dat_only (bitmap_ptr[i+j]); + } + } + wr_dat_stop(); +} + + + +/******************************************************************************* +* Scroll content of the whole display for dy pixels vertically * +* Parameter: dy: number of pixels for vertical scroll * +* Return: * +*******************************************************************************/ + +void GLCD_ScrollVertical (unsigned int dy) { +#if (LANDSCAPE == 0) + static unsigned int y = 0; + + y = y + dy; + while (y >= HEIGHT) + y -= HEIGHT; + + if (Himax) { + wr_reg(0x01, 0x08); + wr_reg(0x14, y>>8); /* VSP MSB */ + wr_reg(0x15, y&0xFF); /* VSP LSB */ + } + else { + wr_reg(0x6A, y); + wr_reg(0x61, 3); + } +#endif +} + + +/******************************************************************************* +* Write a command to the LCD controller * +* Parameter: cmd: command to write to the LCD * +* Return: * +*******************************************************************************/ +void GLCD_WrCmd (unsigned char cmd) { + wr_cmd (cmd); +} + + +/******************************************************************************* +* Write a value into LCD controller register * +* Parameter: reg: lcd register address * +* val: value to write into reg * +* Return: * +*******************************************************************************/ +void GLCD_WrReg (unsigned char reg, unsigned short val) { + wr_reg (reg, val); +} +/******************************************************************************/ diff --git a/F2024/coe718/labs/lab2/bitbanding/bitband.c b/F2024/coe718/labs/lab2/bitbanding/bitband.c new file mode 100755 index 0000000..54c2b63 --- /dev/null +++ b/F2024/coe718/labs/lab2/bitbanding/bitband.c @@ -0,0 +1,115 @@ +#include "LPC17xx.h" +#include "GLCD.h" + +#include + +//------- ITM Stimulus Port definitions for printf ------------------- // +#define ITM_Port8(n) (*((volatile unsigned char *)(0xE0000000+4*n))) +#define ITM_Port16(n) (*((volatile unsigned short*)(0xE0000000+4*n))) +#define ITM_Port32(n) (*((volatile unsigned long *)(0xE0000000+4*n))) + +#define DEMCR (*((volatile unsigned long *)(0xE000EDFC))) +#define TRCENA 0x01000000 + +struct __FILE { int handle; }; +FILE __stdout; +FILE __stdin; + +int fputc(int ch, FILE *f) { + if (DEMCR & TRCENA) { + while (ITM_Port32(0) == 0); + ITM_Port8(0) = ch; + } + return(ch); +} +//------------------------------------------------------------------- // + +#define __USE_LCD 0 // Uncomment to use the LCD +#define __FI 1 // Font index 16x24 + +// Bit Band Macros used to calculate the alias address at run time +#define ADDRESS(x) (*((volatile unsigned long *)(x))) +#define BitBand(x, y) ADDRESS(((unsigned long)(x) & 0xF0000000) | 0x02000000 |(((unsigned long)(x) & 0x000FFFFF) << 5) | ((y) << 2)) + +#ifdef __USE_LCD +static inline void method2lcd(unsigned char* msg) { + GLCD_DisplayString(6, 8, __FI, msg); +} +#endif + +// Simple register masking +static void method_mask(){ + LPC_GPIO1->FIOPIN ^= (1 << 28); + LPC_GPIO2->FIOPIN ^= (1 << 2); +} + +// Define pointer with bitband method +static void method_function(){ + volatile unsigned long* bit1 = &BitBand(&LPC_GPIO1->FIOPIN, 29); + volatile unsigned long* bit2 = &BitBand(&LPC_GPIO2->FIOPIN, 3); + + static _Bool state = 1; + + *bit1 = *bit2 = state; + state = !state; +} + +// Raw bitbanding +static void method_bitbanding() { + const size_t addr1 = 0x22000000 + (0x2009C034 * 32UL) + (31 * 4); + const size_t addr2 = 0x22000000 + (0x2009C054 * 32UL) + (4 * 4); + + static _Bool state = 1; + + ADDRESS(addr1) = ADDRESS(addr2) = state; + state = !state; +} + +void SysTick_Handler(void) { + static size_t tick = 0; + static size_t state = 0; + + if (tick++ < 500) { return; } + tick = 0; + + // Uses MOVS instruction to implement jump table + if (state == 0) { method_mask(); state++; } + else if (state == 1) { method_function(); state++; } + else if (state == 2) { method_bitbanding(); state = 0; } + + #ifdef __USE_LCD + if (state == 1) { method2lcd("MASK "); } + else if (state == 2) { method2lcd("FUNCTION"); } + else if (state == 0) { method2lcd("BITBAND "); } + #endif +} + +int main(void){ + LPC_SC->PCONP |= (1 << 15); /* enable power to GPIO & IOCON */ + LPC_GPIO1->FIODIR |= 0xB0000000; /* LEDs on PORT1 are output */ + LPC_GPIO2->FIODIR |= 0x0000007C; /* LEDs on PORT2 are output */ + + // Configure SysTick with interrupt and internal clock source + ADDRESS(0xE000E010) = (1 << 0) | (1 << 1) | (1 << 2); + + // Run handler every 1ms + ADDRESS(0xE000E014) = 99999; + + #ifdef __USE_LCD + GLCD_Init(); /* Initialize graphical LCD (if enabled */ + + GLCD_Clear(White); /* Clear graphical LCD display */ + GLCD_SetBackColor(Blue); + GLCD_SetTextColor(Yellow); + GLCD_DisplayString(0, 0, __FI, " COE718 Lab 2 "); + GLCD_SetTextColor(White); + GLCD_DisplayString(1, 0, __FI, " bitband.c "); + GLCD_DisplayString(2, 0, __FI, " Watch the LEDs! "); + GLCD_SetBackColor(White); + GLCD_SetTextColor(Blue); + GLCD_DisplayString(6, 0, __FI, "Method:"); + #endif + + // Let SysTick callback run in background + while (1) {} +} \ No newline at end of file diff --git a/F2024/coe718/labs/lab2/bitbanding/bitband.h b/F2024/coe718/labs/lab2/bitbanding/bitband.h new file mode 100755 index 0000000..af5be4a --- /dev/null +++ b/F2024/coe718/labs/lab2/bitbanding/bitband.h @@ -0,0 +1,71 @@ +//***************************************************************************** +// +--+ +// | ++----+ +// +-++ | +// | | +// +-+--+ | +// | +--+--+ +// +----+ Copyright (c) 2011 Code Red Technologies Ltd. +// +// Header file containing C macros to provide bitbanding on Cortex-M3 MCU's +// +// Software License Agreement +// +// The software is owned by Code Red Technologies and/or its suppliers, and is +// protected under applicable copyright laws. All rights are reserved. Any +// use in violation of the foregoing restrictions may subject the user to criminal +// sanctions under applicable laws, as well as to civil liability for the breach +// of the terms and conditions of this license. +// +// THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED +// OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF +// MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. +// USE OF THIS SOFTWARE FOR COMMERCIAL DEVELOPMENT AND/OR EDUCATION IS SUBJECT +// TO A CURRENT END USER LICENSE AGREEMENT (COMMERCIAL OR EDUCATIONAL) WITH +// CODE RED TECHNOLOGIES LTD. +// +//***************************************************************************** + +#ifndef BITBAND_H_ +#define BITBAND_H_ + +/* The Cortex-M3 memory map includes two bit-band regions. These occupy the lowest + * 1MB of the SRAM and peripheral memory regions respectively. + * + SRAM: Bit-band region: 0x20000000 - 0x20100000 + * Bit-band alias: 0x22000000 - 0x23FFFFFF + * + PERI: Bit-band region: 0x40000000 - 0x40100000 + * Bit-band alias: 0x42000000 - 0x43FFFFFF + * The mapping formula: + * bit_word_offset = (byte_offset * 32) + (bit_number * 4) + * bit_word_address = bit_band_base + bit_word_offset + * where: + * + bit_word_offset: the position of the target bit in the bit-band memory region + * + bit_word_addr: the address of the word in the alias memory region that maps to the target bit + * + bit_band_base: the starting address of the alias region + * + byte_offset: the number of byte in the bit-band region that contains the targeted bit + * + bit_number: is the bit position (0-7) of the targeted bit + */ + +/* Bit band SRAM definitions */ +#define BITBAND_SRAM_REF 0x20000000 +#define BITBAND_SRAM_BASE 0x22000000 + +#define BITBAND_SRAM(a,b) ((BITBAND_SRAM_BASE + ((a-BITBAND_SRAM_REF)<<5) + (b<<2))) // Convert SRAM address + +/* Bit band PERIPHERAL definitions */ +#define BITBAND_PERI_REF 0x40000000 +#define BITBAND_PERI_BASE 0x42000000 + +#define BITBAND_PERI(a,b) ((BITBAND_PERI_BASE + ((a-BITBAND_PERI_REF)<<5) + (b<<2))) // Convert PERI address + +/* Basic bit band function definitions */ +#define BITBAND_SRAM_ClearBit(a,b) (*(volatile uint32_t *) (BITBAND_SRAM(a,b)) = 0) +#define BITBAND_SRAM_SetBit(a,b) (*(volatile uint32_t *) (BITBAND_SRAM(a,b)) = 1) +#define BITBAND_SRAM_GetBit(a,b) (*(volatile uint32_t *) (BITBAND_SRAM(a,b))) + +#define BITBAND_PERI_ClearBit(a,b) (*(volatile uint32_t *) (BITBAND_PERI(a,b)) = 0) +#define BITBAND_PERI_SetBit(a,b) (*(volatile uint32_t *) (BITBAND_PERI(a,b)) = 1) +#define BITBAND_PERI_GetBit(a,b) (*(volatile uint32_t *) (BITBAND_PERI(a,b))) + + +#endif /* BITBAND_H_ */ diff --git a/F2024/coe718/labs/lab2/cond_exe/cond_ex.c b/F2024/coe718/labs/lab2/cond_exe/cond_ex.c new file mode 100755 index 0000000..473a9bd --- /dev/null +++ b/F2024/coe718/labs/lab2/cond_exe/cond_ex.c @@ -0,0 +1,36 @@ +//conditional execution code example +#include "LPC17xx.h" + +int main(void){ + int r1 = 1, r2 = 0; + + while(r1 <= 0x07){ + if((r1 - r2) > 0){ + r1 = r1 + 2; + } + else{ + r2 = r2 + 1; + } + } + return 0; +} + + +/* //barrel shifter code +#include "LPC17xx.h" + +int main(void){ + int r1 = 1, r2 = 0, r3 = 5; + + while(r2 <= 0x18){ + if((r1 - r2) > 0){ + r1 = r1 + 2; + r2 = r1 + (r3*4); + r3 = r3/2; + } + else{ + r2 = r2 + 1; + } + } + return 0; +}*/ diff --git a/F2024/coe718/labs/lab2/report/movs.png b/F2024/coe718/labs/lab2/report/movs.png new file mode 100755 index 0000000..ee5b99f Binary files /dev/null and b/F2024/coe718/labs/lab2/report/movs.png differ diff --git a/F2024/coe718/labs/lab2/report/out.pdf b/F2024/coe718/labs/lab2/report/out.pdf new file mode 100644 index 0000000..70a20bf Binary files /dev/null and b/F2024/coe718/labs/lab2/report/out.pdf differ diff --git a/F2024/coe718/labs/lab2/report/profiling.png b/F2024/coe718/labs/lab2/report/profiling.png new file mode 100755 index 0000000..4fd13b6 Binary files /dev/null and b/F2024/coe718/labs/lab2/report/profiling.png differ diff --git a/F2024/coe718/labs/lab2/report/report.md b/F2024/coe718/labs/lab2/report/report.md new file mode 100644 index 0000000..0cbd9c4 --- /dev/null +++ b/F2024/coe718/labs/lab2/report/report.md @@ -0,0 +1,208 @@ +# Objective + +This lab project dives into embedded ARM programming by managing GPIO pins through various methods. +Each method achieves the same effect, +but with different performance characteristics. +Further, unique ARM architecture optimizations such as conditional execution and barrel shifting are explored. + +# Implementation + +## Software + +Building on the first lab, +Lab 2 requires exploring the compiled assembly of the project. +To set up the debugging environment, +several features were first enabled in the simulator: + +- _Execution Profiling > Show Times_: Used to measure CPU time for relevant sections of the code +- _C/C++ > Optimization > (O0|O3)_: Toggles compiler optimizations. + Although -O0 is measurably slower, + it is useful for inspecting raw instructions coherently before the compiler mangles the output for performance. + +Once enabled, +the debugger should provide output containing instructions alongside the corresponding c code, +notice the instructions with their respective execution time: + +![Example of conditional execution through a jump table](./movs.png) + +## Hardware + +The project requires access to the GPIO pins of the board for LED access, +the SysTick implementation for introducing necessary delay, +as well as the LCD for debugging purposes. +The user manual for the LPC17xx chip was heavily consulted, +for gathering memory addresses useful for programming I/O, +and configuring the SysTick timer to provide useful interrupts. + +# Assignment + +The program can be logically considered as a small state machine, +that is configured to change state every 500ms. +Each state represents one of the three methods of accessing GPIO pins, +using its execution time to toggle an individual LED on GPIO ports 1 and 2. + +The `main()` function in this program is only used for chip configuration, +only running a few lines of code before looping indefinitely. +After initializing the LED ports, +the _SysTick_ timer is configured using the internal clock, +which will run its interrupt handler periodically. +This handler callback function is delegated the actual logic of the program, +which will run as the main thread is looping through no-ops. +The `SysTick_Handler()` function is used to implement the state transitions: +it is designed to run each millisecond, +but will accumulate a configured value of _ticks_ before actually transitioning. + +Each method of addressing is handled within its own function. +The decision to wrap the execution of each method within a function was made to present neat boundaries for measuring execution time of each method. +An example run is shown: + +![Runtime profiling the state machine](./profiling.png) + +The compiler is usually able to optimize out any static calculations through static analysis, +and each function will likely be inlined in _-O3 mode_, +thus, this method provides consistent measurements of the relevant part of each function: +writing bits to the specified addresses. + +# Results + +| Method | Time (-O0) | Time (-O3) | % Improvement | +| -------------------- | ---------- | ---------- | ------------- | +| Masking | 0.510us | 0.120us | 76.4% | +| `BitBand()` function | 0.180us | 0.040us | 77.8% | +| Direct Bit Banding | 1.470us | 0.250us | 82.9% | + +: Comparing performance of each method and optimization improvements + +Masking and direct bit banding offer measurably slower execution once results are normalized. +Since they are writing to the GPIO interfaces first, +the internal logic of the chip responsible for controlling GPIO is invoked, +adding a runtime penalty. +The function method bypasses this extraneous GPIO logic +-- writing directly to the register -- +and thus offers the best performance. + +All methods receive a large, +yet roughly similar improvement when compiled with optimizations, +which is to be expected. + +# Appendix + +``` +/* bitband.c*/ + +#include "LPC17xx.h" +#include "GLCD.h" + +#include + +//------- ITM Stimulus Port definitions for printf ------------------- // +#define ITM_Port8(n) (*((volatile unsigned char *)(0xE0000000+4*n))) +#define ITM_Port16(n) (*((volatile unsigned short*)(0xE0000000+4*n))) +#define ITM_Port32(n) (*((volatile unsigned long *)(0xE0000000+4*n))) + +#define DEMCR (*((volatile unsigned long *)(0xE000EDFC))) +#define TRCENA 0x01000000 + +struct __FILE { int handle; }; +FILE __stdout; +FILE __stdin; + +int fputc(int ch, FILE *f) { + if (DEMCR & TRCENA) { + while (ITM_Port32(0) == 0); + ITM_Port8(0) = ch; + } + return(ch); +} +//------------------------------------------------------------------- // + +#define __USE_LCD 0 // Uncomment to use the LCD +#define __FI 1 // Font index 16x24 + +// Bit Band Macros used to calculate the alias address at run time +#define ADDRESS(x) (*((volatile unsigned long *)(x))) +#define BitBand(x, y) ADDRESS(((unsigned long)(x) & 0xF0000000) | 0x02000000 |(((unsigned long)(x) & 0x000FFFFF) << 5) | ((y) << 2)) + +#ifdef __USE_LCD +static inline void method2lcd(unsigned char* msg) { + GLCD_DisplayString(6, 8, __FI, msg); +} +#endif + +// Simple register masking +static void method_mask(){ + LPC_GPIO1->FIOPIN ^= (1 << 28); + LPC_GPIO2->FIOPIN ^= (1 << 2); +} + +// Define pointer with bitband method +static void method_function(){ + volatile unsigned long* bit1 = &BitBand(&LPC_GPIO1->FIOPIN, 29); + volatile unsigned long* bit2 = &BitBand(&LPC_GPIO2->FIOPIN, 3); + + static _Bool state = 1; + + *bit1 = *bit2 = state; + state = !state; +} + +// Raw bitbanding +static void method_bitbanding() { + const size_t addr1 = 0x22000000 + (0x2009C034 * 32UL) + (31 * 4); + const size_t addr2 = 0x22000000 + (0x2009C054 * 32UL) + (4 * 4); + + static _Bool state = 1; + + ADDRESS(addr1) = ADDRESS(addr2) = state; + state = !state; +} + +void SysTick_Handler(void) { + static size_t tick = 0; + static size_t state = 0; + + if (tick++ < 500) { return; } + tick = 0; + + // Uses MOVS instruction to implement jump table + if (state == 0) { method_mask(); state++; } + else if (state == 1) { method_function(); state++; } + else if (state == 2) { method_bitbanding(); state = 0; } + + #ifdef __USE_LCD + if (state == 1) { method2lcd("MASK "); } + else if (state == 2) { method2lcd("FUNCTION"); } + else if (state == 0) { method2lcd("BITBAND "); } + #endif +} + +int main(void){ + LPC_SC->PCONP |= (1 << 15); /* enable power to GPIO & IOCON */ + LPC_GPIO1->FIODIR |= 0xB0000000; /* LEDs on PORT1 are output */ + LPC_GPIO2->FIODIR |= 0x0000007C; /* LEDs on PORT2 are output */ + + // Configure SysTick with interrupt and internal clock source + ADDRESS(0xE000E010) = (1 << 0) | (1 << 1) | (1 << 2); + + // Run handler every 1ms + ADDRESS(0xE000E014) = 99999; + + #ifdef __USE_LCD + GLCD_Init(); /* Initialize graphical LCD (if enabled */ + + GLCD_Clear(White); /* Clear graphical LCD display */ + GLCD_SetBackColor(Blue); + GLCD_SetTextColor(Yellow); + GLCD_DisplayString(0, 0, __FI, " COE718 Lab 2 "); + GLCD_SetTextColor(White); + GLCD_DisplayString(1, 0, __FI, " bitband.c "); + GLCD_DisplayString(2, 0, __FI, " Watch the LEDs! "); + GLCD_SetBackColor(White); + GLCD_SetTextColor(Blue); + GLCD_DisplayString(6, 0, __FI, "Method:"); + #endif + + // Let SysTick callback run in background + while (1) {} +} +``` diff --git a/F2024/coe718/labs/lab2/report/ryeU_logo.png b/F2024/coe718/labs/lab2/report/ryeU_logo.png new file mode 100644 index 0000000..f9a8187 Binary files /dev/null and b/F2024/coe718/labs/lab2/report/ryeU_logo.png differ diff --git a/F2024/coe718/labs/lab2/report/times.txt b/F2024/coe718/labs/lab2/report/times.txt new file mode 100755 index 0000000..f4920a3 --- /dev/null +++ b/F2024/coe718/labs/lab2/report/times.txt @@ -0,0 +1,4 @@ + -O0 -O3 +Masking: 0.510us 0.120us +Function: 0.180us 0.040us +Bitband: 1.470us 0.250us \ No newline at end of file diff --git a/F2024/coe718/labs/lab2/report/title.aux b/F2024/coe718/labs/lab2/report/title.aux new file mode 100644 index 0000000..23c9134 --- /dev/null +++ b/F2024/coe718/labs/lab2/report/title.aux @@ -0,0 +1,8 @@ +\relax +\providecommand\babel@aux[2]{} +\@nameuse{bbl@beforestart} +\providecommand\hyper@newdestlabel[2]{} +\providecommand\HyField@AuxAddToFields[1]{} +\providecommand\HyField@AuxAddToCoFields[2]{} +\babel@aux{english}{} +\gdef \@abspage@last{1} diff --git a/F2024/coe718/labs/lab2/report/title.log b/F2024/coe718/labs/lab2/report/title.log new file mode 100644 index 0000000..0545480 --- /dev/null +++ b/F2024/coe718/labs/lab2/report/title.log @@ -0,0 +1,399 @@ +This is pdfTeX, Version 3.141592653-2.6-1.40.26 (TeX Live 2024/Arch Linux) (preloaded format=pdflatex 2024.9.19) 25 SEP 2024 09:29 +entering extended mode + restricted \write18 enabled. + %&-line parsing enabled. +**title.tex +(./title.tex +LaTeX2e <2023-11-01> patch level 1 +L3 programming layer <2024-02-20> +(/usr/share/texmf-dist/tex/latex/base/article.cls +Document Class: article 2023/05/17 v1.4n Standard LaTeX document class +(/usr/share/texmf-dist/tex/latex/base/size12.clo +File: size12.clo 2023/05/17 v1.4n Standard LaTeX file (size option) +) +\c@part=\count188 +\c@section=\count189 +\c@subsection=\count190 +\c@subsubsection=\count191 +\c@paragraph=\count192 +\c@subparagraph=\count193 +\c@figure=\count194 +\c@table=\count195 +\abovecaptionskip=\skip48 +\belowcaptionskip=\skip49 +\bibindent=\dimen140 +) +(/usr/share/texmf-dist/tex/generic/babel/babel.sty +Package: babel 2024/02/07 v24.2 The Babel package +\babel@savecnt=\count196 +\U@D=\dimen141 +\l@unhyphenated=\language5 + +(/usr/share/texmf-dist/tex/generic/babel/txtbabel.def) +\bbl@readstream=\read2 +\bbl@dirlevel=\count197 + +(/usr/share/texmf-dist/tex/generic/babel-english/english.ldf +Language: english 2017/06/06 v3.3r English support from the babel system +Package babel Info: Hyphen rules for 'british' set to \l@english +(babel) (\language0). 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(max. 8388607) + 23 compressed objects within 1 object stream + 2 named destinations out of 1000 (max. 500000) + 6 words of extra memory for PDF output out of 10000 (max. 10000000) + diff --git a/F2024/coe718/labs/lab2/report/title.out b/F2024/coe718/labs/lab2/report/title.out new file mode 100644 index 0000000..e69de29 diff --git a/F2024/coe718/labs/lab2/report/title.pdf b/F2024/coe718/labs/lab2/report/title.pdf new file mode 100644 index 0000000..fa1f274 Binary files /dev/null and b/F2024/coe718/labs/lab2/report/title.pdf differ diff --git a/F2024/coe718/labs/lab2/report/title.tex b/F2024/coe718/labs/lab2/report/title.tex new file mode 100644 index 0000000..d2f83f4 --- /dev/null +++ b/F2024/coe718/labs/lab2/report/title.tex @@ -0,0 +1,85 @@ +\documentclass[a4paper, 12pt]{article} +\usepackage[english]{babel} +\usepackage[top=1in, bottom=1in, left=1.25in, right=1.25in]{geometry} +\usepackage{graphicx} +\usepackage{tabularx, array} +\usepackage{multirow} +\usepackage[colorlinks=true, urlcolor=blue]{hyperref} + +\renewcommand{\arraystretch}{1.5} + +\begin{document} +\begin{titlepage} +\begin{center} +\includegraphics[width=0.4\textwidth]{ryeU_logo.png} \\ +Faculty of Engineering, Architecture and Science + +\vspace{0.5cm} + +\textbf{Department of Electrical and Computer Engineering} + +\vspace{0.5cm} + +\begin{tabularx}{0.8\textwidth} { + | >{\centering\arraybackslash}X + | >{\centering\arraybackslash}X |} +\hline +Course Number & COE 718\\ +\hline +Course Title & Embedded Systems Design\\ +\hline +Semester/Year & F2024\\ +\hline +Instructor & Dr. Gul Khan\\ +\hline +\end{tabularx} + +\vspace{0.5cm} + +\begin{tabularx}{\textwidth} { + | >{\centering\arraybackslash}X + | >{\centering\arraybackslash}X |} +\hline +\textbf{\Large ASSIGNMENT No.} & Lab 2\\ +\hline +Assignment Title & Exploring ARM Cortex M3 Features \\ +\hline +\end{tabularx} + +\vspace{0.5cm} + +\begin{tabularx}{\textwidth} { + | >{\centering\arraybackslash}X + | >{\centering\arraybackslash}X |} +\hline +Submission Date & Tuesday, September 25\\ +\hline +Due Date & Wednesday, September 25\\ +\hline +\end{tabularx} + +\vspace{0.5cm} + +\begin{tabularx}{\textwidth} { + | >{\centering\arraybackslash}X + | >{\centering\arraybackslash}X |} +\hline +Student Name & Kleidi Bujari\\ +\hline +Student ID & 501040047\\ +\hline +\rule{0pt}{4em} + \raisebox{1.5em}{Signature*} & \raisebox{1.5em}{ \it{Kleidi Bujari} }\\ +\hline +\end{tabularx} + +\vspace{0.5cm} + +\begin{minipage}{\textwidth} +*By signing above you attest that you have contributed to this written lab report and confirm that all work you have contributed to this lab report is your own work. Any suspicion of copying or plagiarism in this work will result in an investigation of Academic Misconduct and may result in a “0” on the work, an “F” in the course, or possibly more severe penalties, as well as a Disciplinary Notice on your academic record under the Student Code of Academic Conduct, which can be found online at: \url{www.ryerson.ca/senate/current/pol60.pdf}. +\end{minipage} +\end{center} +\end{titlepage} +\end{document} + +Collapse -- cgit 1.4.1